DS3100的Stratum 3 / 3E时钟卡IC

表格清单

表1-1 。适用电信Standards................................................................................................................... 7

表6-1 。输入时钟引脚说明.................................................................................................................... 15

表6-2 。输出时钟引脚Descriptions.................................................................................................................. 16

表6-3 。 BITS接收器引脚说明............................................................................................................... 17

表6-4 。 BITS发送引脚说明........................................................................................................... 18

表6-5 。全球引脚说明............................................................................................................................ 19

表6-6 。并行接口引脚说明........................................................................................................... 20

表6-7 。 SPI总线模式引脚说明............................................................................................................... 21

表6-8 。 JTAG接口引脚说明.............................................................................................................. 21

表6-9 。通用I / O引脚说明..................................................................................................... 21

表6-10 。电源引脚说明.............................................................................................................. 22

表7-1 。 GR- 1244 3E级/ 3的稳定性要求......................................... ............................................... 25

表7-2 。输入时钟功能............................................................................................................................ 27

表7-3 。锁定频率模式....................................................................................................................... 28

表7-4 。默认的输入时钟优先级.................................................................................................................... 31

表7-5 。阻尼因素和峰值抖动/漂移增益.......................................... ............................................. 38

表7-6 。 T0为适应T4相位测量方式........................................... ......................................... 42

表7-7 。输出时钟功能......................................................................................................................... 44

表7-8 。 Digital1和Digital2 Frequencies............................................................................................................. 47

表7-9 。 APLL频率为输出频率（ T0和T4 ） ........................................ ...................................... 48

表7-10 。 T0 APLL频率为T0路径配置........................................... ............................................ 48

表7-11 。 T4 APLL频率为T4路径配置........................................... ............................................ 49

表7-12 。 OC1到OC7输出频率选择............................................ .................................................. 50

表7-13 。可能的频率OC1到OC7 ............................................ .................................................. ..... 50

表7-14 。设备冗余方法............................................... .................................................. .. 54

表7-15 。变压器Specifications..................................................................................................................... 67

表7-16 。 DS1报警Criteria.................................................................................................................................. 68

表7-17 。 E1报警标准.................................................................................................................................... 70

表7-18 。 E1同步和重新同步标准................................................................................................................. 70

表7-19 。 2048kHz同步接口规范.............................................. .................................... 73

表7-20 。 6312kHz同步接口规范.............................................. .................................... 73

表7-21 。子母钟的变化................................................................................................................... 74

表7-22 。 GR- 378复合时钟接口规范........................................... ....................................... 76

表7-23 。 G.703同步接口规范............................................ ......................................... 76

表7-24 。微处理器接口模式............................................................................................................ 77

表8-1 。顶级内存Map............................................................................................................................ 81

表8-2 。核心寄存器映射................................................................................................................................... 82

表8-3 。 BITS收发器寄存器映射............................................................................................................. 147

表9-1 。 JTAG指令代码......................................................................................................................... 201

表9-2 。 JTAG ID码........................................................................................................................................ 202

表10-1 。建议的直流工作条件.............................................. .............................................. 203

表10-2 。 DC Characteristics................................................................................................................................ 203

表10-3 。 CMOS / TTL引脚................................................................................................................................... 204

表10-4 。 LVDS引脚............................................................................................................................................ 204

表10-5 。 LVPECL Pins........................................................................................................................................ 205

表10-6 。 AMI复合时钟引脚................................................................................................................... 206

表10-7 。推荐外部元件的输出时钟OC8 ........................................... ................... 206

表10-8 。输入时钟Timing................................................................................................................................ 207

表10-9 。输入时钟输出时钟延时....................................................................................................... 207

表10-10 。输出时钟相位对齐，帧同步对齐方式......................................... ................ 207

表10-11 。 BITS接收器Timing......................................................................................................................... 208

表10-12 。 BITS发送器Timing..................................................................................................................... 209

表10-13 。并行接口Timing..................................................................................................................... 210

表10-14 。 SPI接口时序........................................................................................................................... 213

表10-15 。 JTAG接口Timing........................................................................................................................ 214

表11-1 。引脚分配排序由信号名称............................................ ................................................. 215

表13-1 。热学性能，自然对流............................................. ................................................. 222

6 226