初步数据表

W6692 PCI ISDN S / T - 控制器

W6692

PCI总线ISDN S / T - 控制器

数据表

-1 -

出版日期：

1999年9月30日

修订版0.9

初步数据表

W6692 PCI ISDN S / T - 控制器

本文档中描述的信息是华邦的专有知识产权

电子公司和不得转载未经华邦许可。

华邦仅作参考之用为W6692为基础的系统设计提供了这份文件。

华邦承担错误或遗漏不承担任何责任。所有数据和规格如有

更改，恕不另行通知。

-2 -

出版日期：

1999年9月30日

修订版0.9

初步数据表

W6692 PCI ISDN S / T - 控制器

目录

1.一般DESCRIPTION..........................................................................................................9

2.特点

...................................................................................................................................9

3.引脚配置

............................................................................................................10

4.引脚说明

...................................................................................................................13

5.

系统框图及应用.............................................. ............................. 16

6. BLOCK DIAGRAM....................................................................................................................17

7.功能DESCRIPTIONS...............................................................................................18

7.1主座Functions......................................................................................................................................................18

7.2第1层功能Descriptions.......................................................................................................................................19

7.2.1 S / T接口发射器/接收器.............................................................................................................................19

7.2.2接收机时钟恢复和时序产生......................................................................................................24

7.2.3第1层Activation/Deactivation..................................................................................................................................24

7.2.3.1状态的描述和命令/指示代码........................................ .................................................. 0.24

7.2.3.2状态转换Diagrams....................................................................................................................................26

7.2.4 D通道门禁..........................................................................................................................................30

7.2.5框架Alignment........................................................................................................................................................30

7.2.5.1 FAinfA_1fr ..........................................................................................................................................................31

7.2.5.2 FAinfB_1fr ..........................................................................................................................................................31

7.2.5.3 FAinfD_1fr ..........................................................................................................................................................32

7.2.5.4 FAinfA_kfr ..........................................................................................................................................................32

7.2.5.5 FAinfB_kfr ..........................................................................................................................................................33

7.2.5.6 FAinfD_kfr ..........................................................................................................................................................33

7.2.5.7 Faregain...............................................................................................................................................................34

7.2.6多帧同步.......................................................................................................................................34

7.2.7测试功能............................................................................................................................................................36

7.3串行接口总线.........................................................................................................................................................38

7.4 B信道切换.......................................................................................................................................................38

7.5 PCM Port.........................................................................................................................................................................40

7.6 D通道HDLC控制器..........................................................................................................................................40

7.6.1 D通道信息传输Modes...........................................................................................................................41

-3 -

出版日期：

1999年9月30日

修订版0.9

初步数据表

W6692 PCI ISDN S / T - 控制器

D中7.6.2帧接收Channel..............................................................................................................................41

7.6.3变速箱在D通道帧的........................................................................................................................42

7.7 B通道HDLC控制器..........................................................................................................................................43

7.7.1接待的B信道的帧

.........................................................................................................................43

7.7.2传输帧中的乙通道........................................................................................................................44

7.8 GCI模式串行接口Bus.......................................................................................................................................45

7.8.1 GCI模式C / I0通道Handling..............................................................................................................................46

7.8.2 GCI模式显示器频道Handling........................................................................................................................46

7.9 PCI / MP接口Circuit................................................................................................................................................48

7.9.1 PCI从模式配置串行EEPROM ........................................ .................................................. ....... 48

7.9.2 8位微处理器Interface.....................................................................................................................................49

7.10外设Control.........................................................................................................................................................49

8.注册说明......................................................................................................51

8.1控制芯片和D_ch HDLC控制器......................................................................................................................51

8.1.1 D_ch接收FIFO

D_RFIFO读取地址00H / 00H ............................................ ............................................... 53

8.1.2 D_ch发送FIFO D_XFIFO写地址04H / 01H ...................................... .................................................. 0.53

8.1.3 D_ch命令寄存器D_CMDR读/写地址08H / 02H .................................... ....................................... 54

8.1.4 D_ch模式寄存器的d_mode读/写地址0CH / 03H .................................... ............................................ 54

8.1.5定时器1寄存器TIMR1读/写地址10H / 04H .................................... .................................................. ..55

8.1.6中断状态寄存器ISTA Read_clear地址14H / 05H ...................................... ....................................... 56

8.1.7中断屏蔽寄存器IMASK R / W地址18H / 06H .................................... .................................................. .... 57

8.1.8 D_ch扩展中断寄存器D_EXIR Read_clear地址1CH ....................................... ............................... 57

8.1.9 D_ch扩展中断屏蔽寄存器D_EXIM读/写地址20H / 08H .................................. .................. 58

8.1.10 D_ch状态寄存器D_XSTA读取地址24H / 09H ...................................... ............................................... 58

8.1.11 D_ch接收状态寄存器D_RSTA读取地址28H / 0AH ..................................... .................................... 59

8.1.12 D_ch SAPI地址掩码D_SAM读/写地址2CH / 0BH ................................... ................................... 59

8.1.13 D_ch SAPI1注册

D_SAP1读/写地址30H / 0CH .......................................... ................................... 60

8.1.14 D_ch SAPI2注册D_SAP2读/写地址34H / 0DH .................................... ........................................... 60

8.1.15 D_ch TEI地址掩码D_TAM读/写地址38H / 0EH ................................... ...................................... 60

8.1.16 D_ch TEI1注册D_TEI1读/写地址3CH / 0FH .................................... ............................................ 61

8.1.17 D_ch TEI2注册D_TEI2读/写地址40H / 10H .................................... ............................................ 61

8.1.18 D_ch接收帧字节计数高D_RBCH读取地址44H / 11H ................................... ......................... 61

8.1.19 D_ch接收帧字节计数低D_RBCL读取地址48H / 12H ................................... .......................... 62

20年8月1日定时器2

TIMR2

写地址4CH / 13H ............................................. ............................................. 62

8.1.21层1_Ready码

L1_RC

读/写地址50H / 14H ........................................... .................... 62

8.1.22控制寄存器CTL读/写地址54H / 15H ..................................... .................................................. ...... 63

23年1月8日命令/指示接收寄存器CIR读取地址58H / 16H .................................... ................................ 63

24年1月8日命令/指示发送寄存器CIX读/写地址5CH / 17H .................................. ...................... 64

25年1月8日S / Q通道接收寄存器SQR读取地址60H / 18H ................................... ........................................... 64

26年1月8日S / Q通道发送寄存器SQX读/写地址64H / 19H ................................. ................................. 65

27年8月1日外围控制寄存器PCTL读/写地址68H / 1AH .................................... ................................ 65

28年8月1日监控接收通道0 MO0R读地址6CH / 1BH ..................................... ....................................... 66

29年8月1日监控传输通道0 MO0X读/写地址70H / 1路................................... .............................. 67

8.1.30显示器频道0中断寄存器MO0I Read_clear地址74H / 1DH .................................... .................. 67

8.1.31显示器频道0控制寄存器MO0C读/写地址78H / 1EH .................................. ........................ 67

-4 -

出版日期：

1999年9月30日

修订版0.9

初步数据表

W6692 PCI ISDN S / T - 控制器

32年8月1日GCI模式控制/状态寄存器GCR

读/写

地址7CH / 1FH ....................................... 68

33年8月1日外设地址寄存器XADDR读/写地址F4H / 3DH .................................... ........................... 69

34年8月1日外设数据寄存器XDATA读/写地址F8H / 3EH .................................... ................................. 70

35年8月1日的串行EEPROM控制寄存器EPCTL读/写地址FCH / 3FH ................................... ......................... 71

36年8月1日监测接收通道1寄存器MO1R读地址6DH / 40H .................................... ............................. 71

37年8月1日监控传输通道1 MO1X读/写地址71H / 41H ................................... ............................... 72

38年8月1日显示器频道1中断寄存器MO1I Read_clear地址75H / 42H .................................... .................. 72

39年8月1日显示器频道1控制寄存器MO1C读/写地址79H / 43H .................................. ........................ 72

40年8月1日GCI IC1接收寄存器

IC1R读地址6EH / 44H ............................................ .................................... 73

41年8月1日GCI IC1发送寄存器IC1X读/写地址72H / 45H ................................... .................................. 73

42年8月1日GCI IC2接收寄存器

IC2R读地址6FH / 46H ............................................ .................................... 73

43年8月1日GCI IC2发送寄存器IC2X读/写地址73H / 47H ................................... .................................. 73

44年8月1日GCI CI1指示注册CI1R读地址7DH / 48H ..................................... ....................................... 74

45年8月1日GCI CI1命令寄存器CI1X读/写地址7EH / 49H ................................... ............................... 74

46年8月1日GCI扩展中断寄存器GCI_EXIR Read_clear地址76H / 4AH ..................................... ..................... 74

47年8月1日GCI扩展中断屏蔽寄存器GCI_EXIM读/写地址7AH / 4BH .................................. ............. 75

8.2 B1 HDLC CONTROLER .........................................................................................................................................................75

8.2.1 B1_ch接收FIFO B1_RFIFO读取地址80H / 20H ...................................... ............................................... 76

8.2.2 B1_ch发送FIFO B1_XFIFO写地址84H / 21H ...................................... ........................................... 76

8.2.3 B1_ch命令寄存器B1_CMDR读/写地址88H / 22H .................................... ................................ 77

8.2.4 B1_ch模式寄存器B1_MODE读/写地址8CH / 23H .................................... ...................................... 78

8.2.5 B1_ch扩展中断寄存器B1_EXIR Read_clear地址90H / 24H ..................................... ....................... 79

8.2.6 B1_ch扩展中断屏蔽寄存器B1_EXIM读/写地址94H / 25H .................................. ............... 80

8.2.7 B1_ch状态寄存器B1_STAR读取地址98H / 26H ...................................... ................................................ 80

8.2.8 B1_ch地址掩码寄存器1 B1_ADM1 Read / Write地址9CH / 27H .................................. ......................... 81

8.2.9 B1_ch地址掩码寄存器2 B1_ADM2读/写地址A0H / 28H .................................. ......................... 81

8.2.10 B1_ch地址寄存器1 B1_ADR1读/写地址A4H / 29H ................................... ................................ 81

8.2.11 B1_ch地址寄存器2 B1_ADR2读/写地址A8H / 2AH ................................... ............................... 82

8.2.12 B1_ch接收帧字节计数低B1_RBCL读地址ACH / 2BH ................................... ....................... 82

8.2.13 B1_ch接收帧字节计数高B1_RBCH读地址B0H / 2CH ................................... ...................... 82

8.2.14 B1_ch发送空闲模式B1_IDLE Read / Write地址B4H / 2DH ................................... ............................... 83

8.3 B2 HDLC控制器........................................................................................................................................................83

8.4 PCI配置Register.............................................................................................................................................84

8.4.1设备/供应商ID注册

读取地址00

H

.................................................................................................85

8.4.2状态/命令寄存器

读/写地址04

H

...........................................................................................85

8.4.3类代码/版本ID注册

读取地址08

H

..........................................................................................87

8.4.4头型/延时定时器寄存器

读取地址0℃

H

....................................................................................87

8.4.5基址寄存器0

读/写地址10

H

............................................................................................88

8.4.6基址寄存器1

读/写地址14

H

.............................................................................................89

8.4.7子系统/子系统供应商ID寄存器

阅读地址2C

H

...........................................................................89

8.4.8断线注册

读/写地址3C

H

...............................................................................................90

8.4.9能力指针

读取地址34

H

................................................................................................................90

8.4.10电源管理功能

读取地址40

H

...........................................................................................91

8.4.11电源管理控制/状态

读/写地址44

H

...........................................................................92

9.电气CHARACTERISTICS...........................................................................................94

9.1绝对最大Rating..............................................................................................................................................94

-5 -

出版日期：

1999年9月30日

修订版0.9