飞思卡尔半导体公司
1999年7月16日
常规版本规格
目录
部分
第1节
概述
1.1
1.2
1.3
1.4
1.5
1.5.1
1.5.2
1.5.3
1.5.4
1.5.5
1.5.6
特点...................................................................................................... 1-1
MASK OPTIONS.............................................................................................. 1-2
MCU结构................................................ .......................................... 1-2
引脚分配................................................ ........................................ 1-4
引脚功能说明............................................... ................... 1-4
V
DD
和V
SS
.............................................................................................. 1-4
OSC1 , OSC2 / R ............................................. ............................................... 1-4
RESET......................................................................................................... 1-6
IRQ (可屏蔽中断请求) ............................................ 1-6 ....
PA0 - PA7 ...................................................................................................... 1-6
PB0 - PB5 ...................................................................................................... 1-7
第2节
内存
2.1
2.2
2.3
2.4
I / O和控制寄存器............................................ ....................... 2-2
内存................................................................................................................. 2-2
ROM................................................................................................................. 2-2
I / O寄存器汇总............................................. .............................. 2-3
第3节
中央处理单元
3.1
3.2
3.3
3.4
3.5
3.6
3.6.1
3.6.2
3.6.3
3.6.4
3.6.5
寄存器................................................. .................................................. 3-1
累加器(A ) .............................................. .......................................... 3-2
变址寄存器( X) ............................................. ........................................ 3-2
堆栈指针( SP ) ............................................. ....................................... 3-2
程序计数器(PC ) ............................................. .............................. 3-2
状态码寄存器( CCR ) ............................................ ............... 3-3
半进位( H-位) .......................................... .......................................... 3-3
中断屏蔽( I位) ........................................... ......................................... 3-3
负标志位( N位) ........................................... ........................................... 3-3
零位(Z位) ........................................... .................................................. 3-3
进位/借位位(C位) ......................................... ...................................... 3-4
第4节
中断
4.1
4.2
4.3
4.4
4.5
4.5.1
CPU中断处理............................................... .................... 4-1
RESET中断程序............................................... ................... 4-2
软件中断( SWI ) ............................................. ........................ 4-3
硬件中断................................................ ............................ 4-3
外部中断( IRQ ) ............................................. .......................... 4-3
IRQ控制/状态寄存器( ICSR ) $ 0A ...................................... 4-五
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修订版2.1