XR17C154
5V PCI总线的UART QUAD
xr
REV 。 1.3.2
带FIFO 4.3.3接收器操作......................................................................................................................... 29
F
IGURE
13. R
ECEIVER
O
PERATION IN
FIFO
和
F
低
C
ONTROL
M
ODE
......................................................................................... 29
4.4自动硬件（ RTS / CTS或DTR / DSR ）流控制操作.............................. 29
T
ABLE
10: A
反对派
RTS / CTS
OR
DTR / DSR F
低
C
ONTROL
S
选举
.......................................................................................... 29
F
IGURE
14. A
反对派
RTS / DTR
和
CTS / DSR F
低
C
ONTROL
O
PERATION
...................................................................................... 30
4.5红外模式.......................................................................................................................................... 31
F
IGURE
15. I
NFRARED
T
RANSMIT
D
ATA
E
NCODING和
R
ECEIVE
D
ATA
D
ECODING
.......................................................................... 31
4.6内部环回................................................................................................................................. 32
F
IGURE
16. I
NTERNAL
L
OOP
B
确认
................................................................................................................................................. 32
4.7 UART通道配置寄存器和地址译码....................................... 32
T
ABLE
11 ： UART通道配置寄存器............................................ .................................................. ..... 33
T
ABLE
12 ： UART通道配置寄存器的描述。 S
HADED位被启用
EFR B
IT
-4. ....... 34
4.8寄存器.................................................................................................................................................... 35
4.8.1
4.8.2
4.8.3
4.8.4
接收保持寄存器（ RHR ） - 只读........................................ .................................................. ..
发送保持寄存器（ THR ） - 只写........................................ .................................................
波特率发生器除数（ DLL和DLM ） - 读/写..................................... ...........................
中断使能寄存器（ IER ） - 读/写........................................ ..................................................
35
35
35
35
IER与接收FIFO中断模式Operation................................................................................................. 35
IER与接收/发送FIFO查询模式操作......................................... ............................................ 35
4.8.5中断状态寄存器（ ISR ） - READ-ONLY............................................................................................ 36
T
ABLE
13: I
NTERRUPT
S
环境允许和
P
RIORITY
L
伊维尔基尼
..................................................................................................................... 37
4.8.6 FIFO控制寄存器（ FCR ） - 只写..................................... .................................................. ........... 38
T
ABLE
14: T
RANSMIT和
R
ECEIVE
FIFO牛逼
索具
L
伊维尔基尼
S
选举
............................................................................................ 39
4.8.7线控制寄存器（ LCR ） - 读/写..................................... .................................................. ........... 40
T
ABLE
15: P
元数选择
........................................................................................................................................................ 41
4.8.8调制解调器控制寄存器（ MCR ） - READ / WRITE ..................................... .................................................. .... 41
4.8.9线路状态寄存器（ LSR ） - READ /只....................................................................................................... 42
4.8.10 MODEM状态寄存器（ MSR ） - 只读..................................... .................................................. ....... 43
4.8.11 MODEM状态寄存器（ MSR ） - 只写..................................... .................................................. ...... 44
T
ABLE
16: A
反对派
RS485
ALF
-
复式
D
IRECTION
C
ONTROL
D
ELAY FROM
T
RANSMIT
-
TO
-R
ECEIVE
................................................. 44
4.8.12便笺寄存器（ SPR ） - READ/WRITE................................................................................................. 45
4.8.13功能控制寄存器（ FCTR ） - 读/写..................................... ............................................... 45
T
ABLE
17: 16 S
选举中获胜
H
YSTERESIS
L
EVELS
W
HEN
T
索具
T
ABLE
-D
IS
S
选出
................................................................ 46
4.8.14增强特性寄存器（ EFR ） - 读/写..................................... ................................................ 46
T
ABLE
18: S
OFTWARE
F
低
C
ONTROL
F
受膏
........................................................................................................................ 47
4.8.15 TXCNT [ 7 ： 0 ] ：发送FIFO水平计数器 - 只读................................ ......................................... 48
4.8.16 TXTRG [ 7 ： 0 ] ：发送FIFO触发电平 - 只写................................ ........................................ 48
4.8.17 RXCNT [ 7 ： 0 ] ：接收FIFO水平计数器 - 只读................................ ............................................ 48
4.8.18 RXTRG [ 7 ： 0 ] ：接收FIFO触发电平 - 只写................................ ............................................ 48
T
ABLE
19 ： UART复位条件...................................................................................................................................... 49
5.0编程示例.............................................................................................................50
5.1
卸货接收数据用专用的接收FIFO数据状态.................. 50
绝对最大额定值............................................... .................................... 51
电气特性................................................ ................................ 51
直流电源为5V信令电气特性............................................ ..................... 51
AC电气特性
为
5V信令................................................ ................... 52
F
IGURE
17.
F
IGURE
18.
F
IGURE
19.
F
IGURE
20.
F
IGURE
21.
F
IGURE
22.
F
IGURE
23.
PCI B
US
C
ONFIGURATION
S
PACE
R
EGISTERS
R
EAD和
W
RITE操作
................................................................. 53
D
EVICE
C
ONFIGURATION和
UART
EGISTERS
R
EAD
O
PERATION针对
B
YTE或
DWORD ...................................... 54
D
EVICE
C
ONFIGURATION寄存器
， UART
EGISTERS和
T
RANSMIT
D
ATA
B
URST
W
RITE
O
PERATION
..................... 55
D
EVICE
C
ONFIGURATION
R
EGISTERS
， UART
EGISTERS和
R
ECEIVE
D
ATA
B
URST
R
EAD
O
PERATION
........................ 56
5V PCI B
US
C
LOCK
（ DC
TO
33MH
Z
) .......................................................................................................................... 57
T
RANSMIT
D
ATA
I
NTERRUPT AT
T
索具
L
伊维尔基尼
........................................................................................................... 58
R
ECEIVE
D
ATA
R
EADY
I
NTERRUPT AT
T
索具
L
伊维尔基尼
.................................................................................................. 58
包装DIMENSIONS.................................................................................................59
R
EVISION
H
ISTORY
......................................................................................................................................60
T
干练
C
ONTENTS
............................................................................................................
I
II
