XRT84L38
修订版1.0.1
八路T1 / E1 / J1成帧器
目录
一般Description................................................................................................ 1
F
IGURE
1. XRT84L38 8
通道
DS1 （ T1 / E1 / J1 ）F
RAMER
............................................................................................................ 1
A
PPLICATIONS
.............................................................................................................................................. 2
F
EATURES
.................................................................................................................................................... 2
订购信息................................................................................................................... 3
F
IGURE
2. P
IN
O
UT
T
ABLE
1: L
IST
BY
的
XRT84L38牛逼
OP
V
IEW
(
见销
列表名字与功能
) ............................................................
4
目录.....................................................................................................
I
P
IN
N
棕土
......................................................................................................................................................... 5
引脚说明.........................................................................................................五
T
RANSMIT
S
ERIAL
D
ATA
I
NPUT
...................................................................................................................... 5
O
VERHEAD
I
覆盖整个院落
............................................................................................................................... 14
R
ECEIVE
S
ERIAL
D
ATA
O
安输出
.................................................................................................................. 16
R
ECEIVE
D
ECODER
L
IU
I
覆盖整个院落
............................................................................................................. 23
T
RANSMIT
E
NCODER
L
IU
I
覆盖整个院落
........................................................................................................... 23
T
即时通信
....................................................................................................................................................... 24
L
IU
C
ONTROL
............................................................................................................................................. 25
JTAG......................................................................................................................................................... 26
M
ICROPROCESSOR
I
覆盖整个院落
.................................................................................................................... 27
P
OWER
S
UPPLY
P
插件
................................................................................................................................. 30
G
圆
P
插件
............................................................................................................................................ 30
N
O
C
ONNECT
P
插件
..................................................................................................................................... 31
E
LECTRICAL
C
极特
................................................................................................................... 32
A
BSOLUTE
M
AXIMUMS
................................................................................................................................ 32
DC ê
LECTRICAL
C
极特
............................................................................................................. 32
T
ABLE
2 ： XRT84L38 P
OWER
C
ONSUMPTION
................................................................................................................................. 32
1.0微处理器接口模块.............................................. ........................................... 33
T
ABLE
3 ： μC / μP S
选举
T
ABLE
................................................................................................................................................ 33
1.1信道选择范围内成帧器............................................ .................................................. 34
T
ABLE
4: C
HANNEL
S
选举
...................................................................................................................................................... 34
F
IGURE
3. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
M
ICROPROCESSOR
I
覆盖整个院落
B
LOCK
.................................................................... 35
1.2微处理器接口闭塞信号............................................ .................................. 35
T
ABLE
5 ： XRT84L38 M
ICROPROCESSOR
I
覆盖整个院落
S
表现出恒角色既IGNALS
I
NTEL和
M
OTOROLA
M
副执行秘书办公室
35
T
ABLE
6: I
NTEL模式
: M
ICROPROCESSOR
I
覆盖整个院落
S
IGNALS
...................................................................................................... 36
T
ABLE
7: M
OTOROLA
M
ODE
: M
ICROPROCESSOR
I
覆盖整个院落
S
IGNALS
............................................................................................. 36
1.3接口的XRT84L38向地方μC / μP通过微处理器接口模块36
1.3.1接口连接到微处理器成帧器在8位宽的双向数据总线37
1.3.2数据访问MODES............................................................................................................................................... 37
1.3.2.1 P
ROGRAMMED
I / O ................................................................................................................................................ 37
1.3.2.2 D
ATA
A
CCESS使用
P
ROGRAMMED
I / O ............................................................................................................... 37
F
IGURE
4. I
NTEL
我μP
覆盖整个院落号在
P
ROGRAMMED
I / O
EAD
O
PERATION
................................................................... 38
F
IGURE
5. I
NTEL
我μP
覆盖整个院落
S
期间IGNALS
P
ROGRAMMED
I / O W
RITE
O
PERATION
................................................................. 39
F
IGURE
6. M
OTOROLA
我μP
覆盖整个院落信号的过程中
P
ROGRAMMED
I / O
EAD
O
PERATION
....................................................... 40
F
IGURE
7. M
OTOROLA
我μP
覆盖整个院落信号。在
P
ROGRAMMED
I / O W
RITE
O
PERATION
........................................................... 41
1.3.2.3 B
URST
M
ODE
I / O
为
D
ATA
A
CCESS
................................................................................................................... 41
F
IGURE
8. I
NTEL
我μP
覆盖整个院落
S
IGNALS
,
在
I
NITIAL
R
EAD
O
A的PERATION
B
URST
C
YCLE
.............................................. 43
F
IGURE
9. I
NTEL
我μP
覆盖整个院落
S
IGNALS
,
在随后的
R
EAD
O
A的PERATIONS
B
URST
I / O
YCLE
................................... 44
F
IGURE
10. I
NTEL
我μP
信号的覆盖整个院落
,
在
I
NITIAL
W
RITE
O
A的PERATION
B
URST
C
YCLE
........................................... 46
F
IGURE
11.我μP
覆盖整个院落
S
IGNALS
,
在随后的
W
RITE
O
A的PERATIONS
B
URST
I / O
YCLE
......................................... 47
F
IGURE
12. M
OTOROLA
我μP
覆盖整个院落
S
的过程中IGNALS
I
NITIAL
R
EAD
O
A的PERATION
B
URST
C
YCLE
.................................... 48
F
IGURE
13. M
OTOROLA
我μP
覆盖整个院落
S
IGNALS
,
在随后的
R
EAD
O
A的PERATIONS
B
URST
I / O
YCLE
........................ 49
F
IGURE
14. M
OTOROLA
我μP
信号的覆盖整个院落
,
在
I
NITIAL
W
RITE
O
A的PERATION
B
URST
C
YCLE
.................................. 51
F
IGURE
15. M
OTOROLA
我μP
覆盖整个院落
S
在随后的IGNALS
W
RITE
O
A的PERATIONS
B
URST
I / O
YCLE
........................ 52
1.4 DMA READ / WRITE OPERATIONS................................................................................................................... 52
DMA- 0写入DMA接口..................................................................................................................................... 53
F
IGURE
16. DMA M
ODE的
XRT84L38
和
A
M
ICROPROCESSOR
......................................................................................... 53
1.5存储器和寄存器映射...................................................................................................................... 53
1.5.1内存映射I / O间接ADDRESSING...................................................................................................... 53
I
