引脚说明
表4 。
1
A
B
C
D
E
F
G
H
J
K
P0.03
P1.12
P0.31
P0.29
P0.28
P2.03
STR750Fxx STR751Fxx STR752Fxx STR755Fxx
LFBGA100球连接
2
3
4
P1.04
P1.05
V
18
V
SS18
5
6
7
P0.05
P0.04
V
SS_IO
V
DD_IO
8
P0.06
P2.13
V
SSA_ADC
V
DDA_ADC
9
P0.07
P1.03
P2.11
P2.12
10
P1.02
P2.10
USB_DP
usb_dn
P0.14
P0.15
XRTC2
XRTC1
V
SS_IO
P1.13 P1.14
P0.02 P0.01
P0.00 V
DD_IO
P0.30 V
SS_IO
P0.23 P0.22
P0.21 P0.20
P1.06 P1.08
P1.07 P1.09
P1.10 P2.09
P1.01 P1.15
V
SS_IO
测试P1.00 NRSTOUT VREG_DIS NRSTIN
P2.02
P2.01
P2.19
P0.27
P0.18
P2.04 P2.05
P2.00 P2.07
P2.18 P2.17
P0.19 P0.26
P0.17 P0.16
P2.06
2.08
P0.24
P0.25
XT1
V
SS18
V
18REG
P2.14
P2.15
XT2
V
SSBKP
V
18BKP
P2.16
V
DD_IO
NJTRST P1.18 P1.19
P0.13
P0.11
P0.10
P1.16 P1.17
P0.12 P1.11
P0.09 P0.08
V
DDA_PLL
V
SSA_PLL
表5 。
LFBGA64球连接
1
2
V
SS_IO
V
DD_IO
P0.02
P0.28
P1.19
NJTRST
P0.12
P0.09
3
P1.04
P1.05
P0.00
TEST
P0.20
P1.16
P1.11
P0.08
4
P1.06
P1.07
V
18
V
SS_IO
P0.21
P1.17
P0.19
P0.17
5
P1.08
P1.09
V
SS18
6
P0.05
P0.04
V
DD_IO
7
P0.06
P1.10
V
SS_IO
8
P0.07
P1.03
P0.14
P0.15
XRTC2
XRTC1
A
B
C
D
E
F
G
H
P0.03
P1.12
P0.01
P0.29
P1.18
P0.13
P0.11
P0.10
VREG_DIS V
DDA_ADC
V
SSA_ADC
nRstOut
V
18REG
V
DD_IO
P0.18
nRSTIN
V
SS18
V
SS_IO
P0.16
V
18BKP
V
SSBKP
V
DDA_PLL
V
SSA_PLL
XT2
XT1
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