
目录
段
数
6.9.3.7
6.9.3.8
6.9.3.9
6.9.3.10
6.9.3.11
6.9.3.12
6.9.3.13
6.9.4
6.10
6.10.1
6.10.2
6.11
6.11.1
6.11.2
6.11.3
6.11.4
6.11.5
6.11.6
6.11.7
6.11.8
6.11.9
6.12
6.12.1
6.12.2
6.12.3
6.12.4
6.12.5
6.12.6
6.12.7
6.12.8
6.13
6.13.1
6.13.2
6.13.3
6.13.4
6.13.5
标题
页面
数
周期中断定时器寄存器( PITR ) ........................................... 6-38 ....
软件服务寄存器( SWSR ) ............................................ ........... 6-39
CLKO控制寄存器( CLKOCR ) ............................................ ........... 6-39
PLL控制寄存器( PLLCR ) ............................................ .................. 6-40
时钟分频控制寄存器( CDVCR ) ........................................... ... 6-42
断点地址寄存器( BKAR ) ............................................ 6-44 .......
断点控制寄存器( BKCR ) ............................................ ......... 6-44
E端口引脚分配寄存器( PEPAR ) .......................................... 6-48 ..
内存控制器................................................ ................................. 6-50
内存控制器主要特点.............................................. ............ 6-50
内存控制器概述............................................... .................. 6-51
通用片选概述( SRAM银行) ....................... 6-56
相关的寄存器................................................ ............................. 6-56
8位,16位和32位端口尺寸配置..................................... 6-56 .......
写保护配置............................................... .................... 6-56
可编程的等待状态配置.............................................. 。 6-56
地址和地址空间检查............................................. 6-57 ....
SRAM银行奇偶............................................... .................................. 6-57
外部主支持............................................... ......................... 6-57
全球(引导)片选操作.......................................... ........... 6-58
SRAM总线错误............................................... ..................................... 6-58
DRAM控制器概述( DRAM银行) .......................................... 6 -58
DRAM正常访问支持.............................................. ............... 6-60
DRAM页模式支持.............................................. ..................... 6-60
DRAM突发访问支持.............................................. .................. 6-61
DRAM银行奇偶............................................... ................................. 6-62
刷新操作................................................ ................................. 6-62
DRAM银行外部主支持............................................. ...... 6-63
双驱RAS线............................................. .......................... 6-63
DRAM总线错误............................................... ..................................... 6-63
编程模型................................................ .............................. 6-64
全球存储器寄存器( GMR ) ............................................ ................ 6-64
内存控制器状态寄存器( MSTAT ) ........................................ 6-69
基址寄存器( BR ) ............................................. .................................. 6-70
选项寄存器( OR) ............................................. ................................ 6-74
DRAM , SRAM性能概要; ................................................. 6 -78
第7节
通信处理器模块( CPM )
Introduction.............................................................................................. 7-1
RISC控制器................................................ ....................................... 7-3
RISC控制器配置寄存器( RCCR ) .................................... 7-4
RISC微码版本号.............................................. ........... 7-5
命令集................................................ ........................................ 7-5
命令寄存器的例子............................................... .................. 7-8
命令执行延迟............................................... .................. 7-8
MC68360用户手册
ix
7.1
7.1.1
7.1.2
7.2
7.2.1
7.2.2
摩托罗拉