CS42516

12.1外部滤波元件.............................................. ............................................. 80

12.1.1一般............................................................................................................. 80

12.1.2抖动衰减............................................. .................................................. 80

12.1.3电容的选择............................................. .............................................. 81

12.1.4电路板布局............................................ .............................................. 81

13.附录D ：外部AES3 / SPDIF / IEC60958接收器组成.............. 82

13.1 AES3接收外部元件............................................. .............................. 82

14.附录E ： ADC滤波器PLOTS .......................................... .......................................... 83

15.附录F ： DAC，滤波器PLOTS .......................................... .......................................... 85

图列表

图1.串行音频端口主模式时序......................................... ................................. 12

图2.串行音频接口从模式时序......................................... ................................... 12

图3.控制端口时序 - 我

2

C画幅................................................ ................................... 13

图4.控制端口时序 - SPI格式......................................... .......................................... 14

图5.典型的连接图............................................ .............................................. 20

图6.满量程模拟输入.......................................... .................................................. ...... 21

图7.满量程输出........................................................................................................... 22

图8. ATAPI的框图（ x =通道对1 ，2或3） ................................ ........................ 23

图9. CS42516时钟产生............................................ ............................................... 25

图10.我

2

s串行音频Formats.............................................................................................. 29

图11.左对齐串行音频格式.......................................... .................................... 30

图12.右对齐串行音频格式.......................................... .................................. 30

图13.一条线模式＃ 1串行音频格式....................................... ................................ 31

图14.一条线模式＃ 2串行音频格式....................................... ................................ 31

图15. ADCIN1 / ADCIN2串行音频格式......................................... ................................ 32

图16. OLM配置＃ 1 ........................................... .................................................. ..... 33

图17. OLM配置＃ 2 ........................................... .................................................. ..... 34

图18. OLM配置＃ 3 ........................................... .................................................. ..... 35

图19. OLM配置＃ 4 ........................................... .................................................. ..... 36

图20. OLM配置＃ 5 ........................................... .................................................. ..... 37

图21.控制端口时序SPI模式......................................... ......................................... 38

图22.控制端口时序，我

2

C写的................................................ ...................................... 39

图23.控制端口时序，我

2

C读取................................................ ..................................... 39

图24.推荐的模拟输入缓冲器........................................... .................................. 75

图25.推荐的模拟输出缓存........................................... ............................... 75

图26.通道状态数据缓冲结构.......................................... ................................ 77

图27. PLL框图...................................................................................................... 79

PLL图28抖动衰减特性.......................................... ............................ 80

图29.推荐布局范例............................................ ...................................... 81

图30.消费者输入电路............................................ .................................................. .. 82

图31. S / PDIF输入MUX电路......................................... .................................................. 。 82

图32. TTL / CMOS输入Circuit............................................................................................... 82

图33.单速度模式阻带抑制.......................................... ........................... 83

图34.单速模式的过渡频带.......................................... .................................. 83

图35.单速模式的过渡频带（详情） ....................................... ........................ 83

图36.单速模式通带纹波.......................................... ................................ 83

图37.双速模式阻带抑制.......................................... .......................... 83

图38.双速模式的过渡频带.......................................... ................................ 83

图39.双速模式的过渡频带（详情） ....................................... ....................... 84

图40.双速模式通带纹波.......................................... .............................. 84

图41.四速模式阻带抑制.......................................... ............................. 84

图42.四速模式的过渡频带.......................................... ................................... 84

4

DS583PP5