初步
REV 。 P1.0.0
XRT83VSH28
8路E1短程线路接口单元
一般DESCRIPTION................................................................................................. 1
A
PPLICATIONS
............................................................................................................................................... 1
F
IGURE
1. B
LOCK
D
的作者IAGRAM
XRT83VSH28 E1刘(H
OST
M
ODE
)........................................................................................ 1
F
IGURE
2. B
LOCK
D
的作者IAGRAM
XRT83VSH28 E1刘(H
ARDWARE
M
ODE
) ............................................................................... 2
F
EATURES
..................................................................................................................................................... 3
订购信息.................................................................................................................... 3
引脚说明按功能.............................................. ..................................... 5
R
ECEIVE
S
挠度
......................................................................................................................................... 5
T
RANSMIT
S
挠度
....................................................................................................................................... 8
P
ARALLEL
M
ICROPROCESSOR
I
覆盖整个院落
..................................................................................................... 10
抖动
A
TTENUATOR
.................................................................................................................................... 12
C
LOCK
S
YNTHESIZER
................................................................................................................................... 12
A
LARM
F
受膏
/R
EDUNDANCY
S
UPPORT
................................................................................................. 14
S
ERIAL
M
ICROPROCESSOR
I
覆盖整个院落
......................................................................................................... 16
P
OWER和
G
圆
.................................................................................................................................. 16
功能说明................................................ ......................................... 19
1.0硬件模式VS主机模式............................................ .................................................. .. 19
在硬件模式下1.1的功能差异............................................ .......................................... 19
T
ABLE
1: D
IFFERENCES
B
ETWEEN
H
ARDWARE
M
ODE和
H
OST
M
ODE
.......................................................................................... 19
2.0接收通道线路接口............................................. .................................................. ..... 20
F
IGURE
3. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
R
ECEIVE
P
ATH
...................................................................................................... 20
2.1线路终端( RTIP / RRING ) .............................................................................................................. 20
2.1.1案例1:内部TERMINATION.......................................................................................................................... 20
T
ABLE
2: S
选举
I
NTERNAL
I
MPEDANCE
............................................................................................................................. 20
F
IGURE
4. T
YPICAL
C
ONNECTION
D
IAGRAM
U
星
I
NTERNAL
T
发芽
.................................................................................... 20
2.1.2案例2 :内部端接一个外部固定电阻器适用于所有模式.................... 21
T
ABLE
3: S
选举
V
的作者ALUE
E
XTERNAL
F
IXED
R
ESISTOR
............................................................................................. 21
F
IGURE
5. T
YPICAL
C
ONNECTION
D
IAGRAM
U
星
O
NE
E
XTERNAL
F
IXED
R
ESISTOR
....................................................................... 21
2.2时钟和数据恢复................................................................................................................... 22
F
IGURE
6. R
ECEIVE
D
ATA
U
PDATED ON THE
R
伊辛
E
作者: DGE
RCLK ................................................. ............................................. 22
F
IGURE
7. R
ECEIVE
D
ATA
U
PDATED ON THE
F
奥林
E
作者: DGE
RCLK ................................................. ........................................... 22
T
ABLE
4: T
即时通信
S
PECIFICATIONS FOR
RCLK / RPOS / RNEG .......................................................................................................... 22
2.2.1接收灵敏度.............................................................................................................................................. 23
F
IGURE
8. T
美东时间
C
ONFIGURATION FOR
M
EASURING
R
ECEIVE
S
ENSITIVITY
........................................................................................ 23
2.2.2干扰余量......................................................................................................................................... 23
F
IGURE
9. T
美东时间
C
ONFIGURATION FOR
M
EASURING
I
干涉现象
M
ARGIN
.................................................................................... 23
2.2.3一般报警检测和中断产生......................................... ............................... 23
2.3接收抖动衰减器.................................................................................................................. 24
2.4 HDB3解码器............................................................................................................................................ 25
2.5 RPOS / RNEG / RCLK ........................................................................................................................................ 25
F
IGURE
10. S
炉火
R
AIL
M
ODE
W
ITH一个
F
IXED
R
EPEATING
"0011" P
ATTERN
................................................................................... 25
F
IGURE
11. D
UAL
R
AIL
M
ODE
W
ITH一个
F
IXED
R
EPEATING
"0011" P
ATTERN
...................................................................................... 25
2.6 RXMUTE ( LOS接收器具有数据静音) ......................................... .............................................. 26
F
IGURE
12. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
R
X
静音F
油膏
............................................................................................ 26
3.0发送通道线路接口............................................. .................................................. .. 27
F
IGURE
13. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
T
RANSMIT
P
ATH
................................................................................................... 27
3.1 TCLK / TPOS / TNEG数字输入............................................................................................................ 27
F
IGURE
14. T
RANSMIT
D
ATA
S
AMPLED ON
F
奥林
E
作者: DGE
TCLK ................................................. .............................................. 27
F
IGURE
15. T
RANSMIT
D
ATA
S
AMPLED ON
R
伊辛
E
作者: DGE
TCLK ................................................. ................................................ 27
T
ABLE
5: T
即时通信
S
PECIFICATIONS FOR
TCLK / TPOS / TNEG ........................................................................................................... 28
3.2 HDB3编码器............................................................................................................................................ 28
T
ABLE
6: E
作者XAMPLES
HDB3 ê
NCODING
...................................................................................................................................... 28
3.3传输抖动衰减器............................................................................................................... 29
T
ABLE
7: M
AXIMUM
G
AP
W
ID FOR
M
ULTIPLEXER
/M
冲击片雷管
A
PPLICATIONS
.................................................................................... 29
3.4 TAOS (发送全1) ..................................................................................................................... 29
F
IGURE
16. TAOS (T
RANSMIT
A
LL
O
NES
)...................................................................................................................................... 29
3.5 TRANSMIT诊断功能.......................................................................................................... 29
3.5.1 ATAOS (自动传输所有ONES)......................................................................................................... 29
F
IGURE
17. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
ATAOS F
油膏
............................................................................................... 30
3.5.2 QRSS GENERATION..................................................................................................................................................三十
T
ABLE
8: R
ANDOM
B
IT
S
EQUENCE
P
OLYNOMIALS
........................................................................................................................... 30
I