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XRT83L34
QUAD T1 / E1 / J1 LH /时钟恢复和抖动衰减器SH收发器
修订版1.0.1
目录
一般DESCRIPTION....................................................................................................1
A
PPLICATIONS
................................................................................................................................................ 1
图1. XRT83L34 T1 / E1 / J1刘框图(主机模式) ................................ 1 ...........
该XRT83L34 T1 / E1 / J1刘图2.框图(硬件模式) ................................ ... 2
F
EATURES
..................................................................................................................................................... 2
订购信息....................................................................................................................... 3
图3.引脚输出的XRT83L34.................................................................................................... 4
目录.....................................................................................................
I
引脚说明按功能.............................................. ........................................ 5
R
ECEIVE
S
ECTIONS
........................................................................................................................................ 5
T
变送器
S
ECTIONS
................................................................................................................................ 9
M
ICROPROCESSOR
I
覆盖整个院落
..................................................................................................................... 13
J
伊特尔
A
TTENUATOR
.................................................................................................................................... 19
C
LOCK
S
YNTHESIZER
................................................................................................................................... 20
A
LARM
F
油膏
//R
EDUNDANCY
S
UPPORT
.................................................................................................. 21
P
OWER和地
................................................................................................................................... 25
功能说明................................................ ............................................ 26
M
ASTER
C
LOCK
G
enerator
....................................................................................................................... 26
图4.两个输入时钟Source................................................................................................... 26
图5.一个输入时钟源........................................... .................................................. ...... 26
T
ABLE
1: M
ASTER
C
LOCK
G
enerator
................................................................................................ 27
RECEIVER........................................................................................................................... 27
R
ECEIVER
I
NPUT
.......................................................................................................................................... 27
R
ECEIVE
M
onitor
M
ODE
............................................................................................................................. 28
R
ECEIVER
L
开放源码软件
S
IGNAL
(RLOS)............................................................................................................. 28
图6. -15dB T1 / E1短距模式简图和RLOS条件............... 28
图7. -29dB T1 / E1增益模式简图和RLOS条件.......................... 29
图8. -36dB T1 / E1长距离模式的简化框图和RLOS条件................ 29
扩展RLOS模式图9.简化框图(仅限于E1 ) ..................................... .......... 30
R
ECEIVE
HDB3 / B8ZS
ECODER
................................................................................................................. 30
R
ECOVERED
C
LOCK
( RCLK )S
AMPLING
E
DGE
.............................................................................................. 30
图10.接收时钟和输出数据定时......................................... .............................. 30
J
伊特尔
A
TTENUATOR
.................................................................................................................................... 30
G
APPED
C
LOCK
( JA M
UST BE
E
NABLED IN THE
T
RANSMIT
P
ATH
) .................................................................. 31
T
ABLE
2: M
AXIMUM
G
AP
W
ID FOR
M
ULTIPLEXER
/M
冲击片雷管
A
PPLICATIONS
......................................... 31
A
RBITRARY
P
ULSE
G
ENERATOR FOR
T1
与ê
1 ........................................................................................... 32
图11.任意脉冲段分配........................................... ............................... 32
变送器................................................................................................................... 32
D
IGITAL
D
ATA
F
ORMAT
................................................................................................................................. 32
T
RANSMIT
C
LOCK
( TCLK )S
AMPLING
E
DGE
.................................................................................................. 32
图12.发送时钟和输入数据定时......................................... ................................ 33
T
RANSMIT
HDB3 / B8ZS ê
NCODER
................................................................................................................ 33
T
ABLE
3: E
作者XAMPLES
HDB3 ê
NCODING
........................................................................................... 33
T
ABLE
4: E
作者XAMPLES
B8ZS ê
NCODING
............................................................................................ 33
D
河
F
AILURE
M
onitor
( DMO ) ............................................................................................................... 33
T
RANSMIT
P
ULSE
S
HAPER
& L
INE
B
UILD
O
UT
( LBO )
电路
........................................................................ 34
T
ABLE
5: R
ECEIVE
E
QUALIZER
C
ONTROL和
T
RANSMIT
L
INE
B
UILD
-O
UT
S
ETTINGS
............................ 34
发送和接收端子的.............................................. ...................... 36
接收器(C
HANNELS
0 - 3) ..................................................................................................................... 36
内部接收终端模式............................................................................................................ 36
T
ABLE
6: R
ECEIVE
T
发芽
C
ONTROL
.......................................................................................... 36
图13.简化框图内部接收和发送端接方式......... 36
I