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XRT83L314
14通道T1 / E1 / J1长途/短途线路接口单元
2004年5月
修订版1.0.0
概述
该XRT83L314是一个完全集成的14通道长
长途和短途线路接口单元( LIU)的
工作于3.3V单电源供电。运用
内部终端,在刘提供的一个法案
材料中的T1 , E1或J1模式操作
分别对每个通道的基础上以最小的
的外部元件。
刘特点
通过一个标准的微处理器编程
界面。 Exar的刘已获得专利的高阻抗
电路,使发送器输出和接收器
输入要经历时,高阻抗
电源故障或当刘断电。关键
在廖内的设计特点优化1 : 1或1 + 1
冗余和非侵入式监控应用
为确保可靠性,而无需使用继电器。
片上时钟合成器产生的T1 / E1 / J1
时钟速率从一个可选择的外部时钟频率
并具有可用于五个输出时钟基准
外部定时( 8kHz的, 1.544Mhz , 2.048MHz的,
NXT1 / J1 , nxE1 ) 。
F
IGURE
1. B
LOCK
D
的作者IAGRAM
XRT83L314
其他功能还包括RLOS , 16位LCV
计数器对每个通道, AIS , QRSS代/
检测,网络环路代码生成/检测,
TAOS , DMO和诊断环回模式。
应用
T1数字交叉连接( DSX - 1 )
ISDN基群速率接口
CSU / DSU E1 / T1 / J1接口
T1 / E1 / J1的LAN / WAN路由器
公共交换系统和PBX接口
T1 / E1 / J1多路复用器和信道
集成多业务接入平台( IMAPS )
综合接入设备(IAD )
ATM反向多路复用( IMA )
无线基站
1 14个频道
NLCD
GENERATION
司机
MONITOR
TCLK
TPOS
TNEG
HDB3/B8ZS
编码器
TX抖动
衰减器
定时
控制
TX脉冲
整形&
模式创
LINE
司机
TTIP
特林
类似物
环回
远程
环回
数字
环回
QRSS
GENERATION
&检测
RCLK
RPOS
RNEG
HDB3/B8ZS
解码器
RX抖动
衰减器
时钟&数据
恢复
PEAK
探测器
&放大器;切片机
Rx
均衡器
RTIP
RRING
RX均衡器
控制
NLCD
发现
AIS & LOS
探测器
DMO
RLOS
信息和通信技术
TEST
TEST
微处理器
接口
可编程的主
时钟合成器
8kHzOUT
MCLKE1out
MCLKT1out
MCLKE1Nout
MCLKT1Nout
RXON
RXTSEL
[10:0]
[7:0]
TXON
UpCLK
uPTS2
uPTS1
uPTS0
CS [5: 1]
RDY_TA
RD_WE
WR_R / W
Exar公司
公司48720加藤道,弗里蒙特CA, 94538
(510) 668-7000
传真( 510 ) 668-7017
www.exar.com
MCLKIN
ADDR
CS
ALE
数据
RESET
INT
XRT83L314
14通道T1 / E1 / J1长途/短途线路接口单元
修订版1.0.0
特点
接收监控模式处理0 29分贝电阻
衰减(平损失)以及0在6dB电缆损耗
为T1和E1 。
完全集成的14通道短程和长
长途收发器T1 / J1 ( 1.544MHz )和E1
( 2.048MHz的)应用。
接收器线路衰减指示输出以1dB
步骤。
T1 / E1 / J1短途,长途,以及时钟频率是
每个端口通过软件选择不
更换部件。
信号( RLOS )根据ITU -T G.775损耗/
ETS300233 ( E1 )和ANSI T1.403 ( T1 / J1 ) 。
在两个接收内部阻抗匹配和
发送对75Ω (E1) , 100Ω (T1), 110Ω (J1) ,与
120Ω ( E1)的应用是每个端口可选择
通过软件在不改变组件。
可编程接收限幅器阈值(45% ,50%,
55 %或68%) ,以提高接收器的干扰
免疫力。
断电对每个通道的基础上与
独立的接收和发送的选择。
可编程的数据流时静音RLOS
检测。
对于T1五预编程的发射脉冲设置
短距离应用。
片上的HDB3 / B8ZS编码器/解码器与一个
内部16位计数器LCV每个通道。
任意脉冲发生器T1和E1模式。
传输线打造出局( LBO)的T1长途
从0分贝应用在3到-22.5dB -7.5dB
在每个通道的基础步骤。
芯片上的高投入数字时钟恢复电路
抖动容限。
QRSS码型发生器和检测试验
和监视。
片上发射的短路保护和
限流保护线路驱动器免遭损坏每对
通道的基础。
错误和双极性侵犯的插入和检测。
传输所有的人( TAOS )和带内网络环路
向上和向下循环代码的生成。
独立晶振的数字抖动衰减器
( JA )与32位或64位的FIFO用于接收和
传输路径
自动循环代码检测远端环回
激活。
支持本地模拟,远程,数字,和双
环回模式。
片上倍频器产生T1或E1
从各种外部时钟的主时钟
来源( 8 , 16 , 56 , 64 , 128 , 256KHz的和1X , 2X ,
4X,8X T1或E1 )
低功耗:每通道170MW ( 50 %
密度)。
的驱动程序故障监视器输出( DMO )警报
可能的系统或外部组件的问题。
每通道最大功耗为250mW
( 100%浓度) 。
发送输出和接收输入可能"High"
阻抗
保护
or
对每个通道进行申请。
冗余
3.3V单电源供电( 3V至5V的I / O
宽容) 。
支持自动保护倒换。
1:1和无继电器1 + 1保护。
从0可选接收灵敏度36分贝电缆
损失中的T1 @ 772kHz ,0 43分贝电缆损耗在
E1 @ 1,024kHz 。
304引脚封装TBGA
-40 ° C至+ 85°C温度范围
支持跳空的时钟映射器/多路转换器
应用程序。
产品订购信息
P
RODUCT
N
棕土
XRT83L314IB
P
ACKAGE
T
YPE
304铅TBGA
O
操作摄像机
T
emperature
R
ANGE
-40 ° C至+ 85°C
2
23
WRB_RWB TCLK_8 TPOS_10 TPOS_7 DGND_DRV RVDD_7
RTIP_7 RRING_7
RGND_7 RGND_6 RRING_6
RTIP_6
RVDD_6 MCLKOUT_T1 MCLKIN MCLKOUT_E1 MCLKE1xN
TCLK_5
ICTB
unnamed.12
22
A
B
C
RGND_5
RRING_5
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
A[10]
CSB
CSB4
unnamed.2
RESETB
CSB1
CSB5
TPOS_8 TNEG_9 TNEG_10 TCLK_7 VDDPLL_21 RCLK_7 TVDD_7
TRING_7 TRING_6 TVDD_6
RCLK_6
MCLKT1xN
TPOS_6
TCLK_3
TCLK_4
TPOS_4
INTB
DGND_DRV unnamed.17
RGND_8
A[8]
DVDD_DRV
CSB3
ALE_AS TNEG_8 TCLK_9
TNEG_7 VDDPLL_22 RNEG_7
TTIP_7
DGND_6_7 TTIP_6 RNEG_6 GNDPLL_22 GNDPLL_21
TNEG_6
TNEG_3
TNEG_4
TPOS_5
DVDD_PRE
TRING_5
RRING_8
TRING_8
unnamed.7
DVDD_PRE
CSB2
RDB_DSB TPOS_9
TCLK_10 DGND_PRE RPOS_7 TGND_7 DVDD_6_7 TGND_6 RPOS_6 DVDD_DRV EIGHT_KHZ
TCLK_6
TPOS_3
TNEG_5
TEST
unnamed.13
TVDD_5
D
RTIP_5
RTIP_8
RVDD_8
TVDD_8
A[9]
unnamed.11
TTIP_5
RVDD_5
E
RCLK_5
RVDD_4
RVDD_9
RCLK_8
TTIP_8
TGND_8
TGND_5
RNEG_5
F
RNEG_4
RCLK_4
RTIP_4
THE XRT83L314引脚OUT
RTIP_9
RCLK_9
RNEG_8
RPOS_8
RPOS_5
G
RPOS_4
TTIP_4
TRING_4
RRING_4
RRING_9
TVDD_9
RNEG_9
RPOS_9
H
TGND_4
TVDD_4
DVDD_3_4_5 RGND_4
RGND_9
TRING_9
TTIP_9
TGND_9
J
AVDD_BIAS DVDD_DRV
unnamed.14 unnamed.16
DVDD_8_9_10 unnamed.1 unnamed.3
unnamed.4
K
DGND_PRE AGND_BIAS DGND_3_4_5 unnamed.10
DGND_8_9_10 unnamed.6 DGND_DRV DGND_PRE
L
TGND_3
TTIP_3
TRING_3
RGND_3
XRT83L314
14通道T1 / E1 / J1长途/短途线路接口单元
3
TGND_10
RGND_10
TRING_10
TTIP_10
底部视图
M
RPOS_3
RNEG_3
TVDD_3
RRING_3
RRING_10
TVDD_10
RNEG_10
RPOS_10
N
RPOS_2
RNEG_2
RCLK_3
RTIP_3
RTIP_10
RCLK_10
RNEG_11
RPOS_11
P
TGND_2
TTIP_2
RCLK_2
RVDD_3
RVDD_10
RCLK_11
TTIP_11
TGND_11
R
DGND_1_2
TVDD_2
RVDD_2
RTIP_2
RTIP_11
RVDD_11
TVDD_11
TRING_11
T
TVDD_1
DGND_DRV
TRING_2
RRING_2
RRING_11
DVDD_DRV DVDD_11_12 DGND_11_12
U
TGND_1
TRING_1
DVDD_1_2
RGND_2
RGND_11
TRING_12
TVDD_12
TGND_12
V
RPOS_1
TTIP_1
RGND_1
RRING_1
RRING_12
RGND_12
TTIP_12
RPOS_12
W
TPOS_0
TNEG_1
D[3]
DVDD_PRE
DMO
RNEG_1
RVDD_1
RTIP_1
RTIP_12
RCLK_12
RNEG_12
DVDD_PRE
A[1]
A[7]
TCLK_12 TCLK_13
RXTSEL RPOS_13 TGND_13 DGND_13_0 TGND_0 RPOS_0 GNDPLL_12
Y
RCLK_0
DGND_DRV
TNEG_2
TPOS_1
D[4]
D[7]
RDY_DTACKB
RCLK_1
unnamed.9
RVDD_12
unnamed.5
UPTS0
A[2]
A[6]
TPOS_12 TNEG_11 DVDD_DRV DVDD_UP RNEG_13 TTIP_13 DVDD_13_0 TTIP_0 RNEG_0
AA
RVDD_0
DGND_PRE
TNEG_0
TPOS_2
D[0]
D[2]
D[6]
UpCLK
RLOS
DGND_DRV
UPTS1
A[3]
A[5]
RXOFF TPOS_11 TPOS_13 VDDPLL_12 DGND_UP RCLK_13 TVDD_13 TRING_13 TRING_0 TVDD_0
AB
RTIP_0
GNDPLL_11
TCLK_0
TCLK_2
TCLK_1
D[1]
D[5]
DVDD_DRV unnamed.0
修订版1.0.0
UPTS2
A[0]
A[4]
TXOFF
TNEG_12 TCLK_11 TNEG_13 VDDPLL_11 RVDD_13 RTIP_13 RRING_13 RGND_13 RGND_0 RRING_0
AC
XRT83L314
14通道T1 / E1 / J1长途/短途线路接口单元
修订版1.0.0
目录
一般DESCRIPTION.............................................................................................................. 1
应用.......................................................................................................................................................... 1
F
IGURE
1. B
LOCK
D
的作者IAGRAM
XRT83L314 .................................................................................................................................... 1
特点
..................................................................................................................................................................... 2
产品订购信息............................................... .................................................. 0.2
的引脚OUT XRT83L314........................................................................................................ 3
T
干练
C
ONTENTS
............................................................................................................I
PIN DESCRIPTIONS....................................................................................................................... 3
M
ICROPROCESSOR
........................................................................................................................................................ 3
R
ECEIVER
S
挠度
....................................................................................................................................................... 4
T
变送器
S
挠度
.................................................................................................................................................. 7
C
ONTROL
F
油膏
...................................................................................................................................................... 9
C
LOCK
S
挠度
............................................................................................................................................................ 9
P
OWER和
G
.................................................................................................................................................. 10
N
O
C
ONNECTS
............................................................................................................................................................ 12
1.0时钟合成器.......................................................................................................................13
T
ABLE
1: I
NPUT
C
LOCK
S
环境允许
S
ELECT
.............................................................................................................................................. 13
F
IGURE
2. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
C
LOCK
S
YNTHESIZER
................................................................................................... 14
1.1所有T1 / E1模式........................................................................................................................................... 14
2.0接收通道线路接口.....................................................................................................14
F
IGURE
3. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
R
ECEIVE
P
ATH
............................................................................................................ 14
2.1线路终端( RTIP / RRING ) .............................................................................................................. 15
2.1.1案例1:内部TERMINATION.......................................................................................................................... 15
F
IGURE
4. T
YPICAL
C
ONNECTION
D
IAGRAM
U
I
NTERNAL
T
发芽
.......................................................................................... 15
T
ABLE
2: S
选举
I
NTERNAL
I
MPEDANCE
.................................................................................................................................... 15
2.1.2案例2 :内部端接一个外部固定电阻器适用于所有模式..................... 16
F
IGURE
5. T
YPICAL
C
ONNECTION
D
IAGRAM
U
O
NE
E
XTERNAL
F
IXED
R
ESISTOR
.............................................................................. 16
T
ABLE
3: S
选举
V
的作者ALUE
E
XTERNAL
F
IXED
R
ESISTOR
.................................................................................................... 16
2.2均衡器控制................................................................................................................................. 17
F
IGURE
6. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
E
QUALIZER和
P
EAK
D
etector
................................................................................. 17
2.3电缆损耗指示器............................................................................................................................. 17
F
IGURE
7. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
C
ABLE
L
OSS
I
NDICATOR
................................................................................................ 17
2.4均衡器衰减FLAG .............................................................................................................. 18
F
IGURE
8. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
E
QUALIZER
A
TTENUATION
F
LAG
.................................................................................... 18
2.5峰值检波器和切片机................................................................................................................... 18
T
ABLE
4: S
选举
S
LICER
L
埃维尔为
P
EAK
D
etector
....................................................................................................... 18
2.6时钟和数据恢复................................................................................................................... 19
F
IGURE
9. R
ECEIVE
D
ATA
U
PDATED ON THE
R
伊辛
E
作者: DGE
RCLK..................................................................................................... 19
F
IGURE
10. R
ECEIVE
D
ATA
U
PDATED ON THE
F
奥林
E
作者: DGE
RCLK................................................................................................. 19
2.6.1接收灵敏度.............................................................................................................................................. 20
F
IGURE
11. T
美东时间
C
ONFIGURATION FOR
M
EASURING
R
ECEIVE
S
ENSITIVITY
............................................................................................ 20
T
ABLE
5: T
即时通信
S
PECIFICATIONS FOR
RCLK/RPOS/RNEG................................................................................................................. 20
2.6.2干扰余量......................................................................................................................................... 21
F
IGURE
12. T
美东时间
C
ONFIGURATION FOR
M
EASURING
I
干涉现象
M
ARGIN
......................................................................................... 21
2.6.3一般报警检测和中断产生......................................... ............................... 21
F
IGURE
13. I
NTERRUPT
G
eneration
P
ROCESS
B
LOCK
......................................................................................................................... 21
2.6.3.1 RLOS (R
ECEIVER
L
开放源码软件
S
IGNAL
) ..................................................................................................................... 21
F
IGURE
14. A
NALOG
R
ECEIVE
L
作者: OS
S
IGNAL FOR
T1/E1/J1................................................................................................................ 22
2.6.3.2 EXLOS (E
XTENDED
L
开放源码软件
S
IGNAL
) .................................................................................................................. 22
2.6.3.3 AIS (A
LARM
I
NDICATION
S
IGNAL
) ......................................................................................................................... 22
2.6.3.4 NLCD (N
ETWORK
L
OOP
C
ODE
D
ETECTION
) .......................................................................................................... 22
T
ABLE
6: A
NALOG
RLOS
ECLARE
/C
LEAR
(T
YPICAL
V
ALUES
)
T1 / E1 ............................................... .............................................. 22
F
IGURE
15. P
ROCESS
B
A
UTOMATIC
L
OOP
C
ODE
D
ETECTION
................................................................................................ 23
2.6.3.5 FLSD ( FIFO L
IMIT
S
TATUS
D
ETECTION
) ............................................................................................................... 24
2.6.3.6 LCV / OFD (L
INE
C
ODE
V
IOLATION
/ C
OUNTER
O
verflow
D
ETECTION
) ................................................................. 24
2.7接收抖动衰减器.................................................................................................................. 24
2.8 HDB3 / B8ZS解码器.................................................................................................................................. 24
2.9 RPOS / RNEG / RCLK ........................................................................................................................................ 25
F
IGURE
16. S
炉火
R
AIL
M
ODE
W
ITH一个
F
IXED
R
EPEATING
"0011" P
ATTERN
......................................................................................... 25
I
XRT83L314
14通道T1 / E1 / J1长途/短途线路接口单元
修订版1.0.0
F
IGURE
17. D
UAL
R
AIL
M
ODE
W
ITH一个
F
IXED
R
EPEATING
"0011" P
ATTERN
............................................................................................ 25
2.10 RXMUTE ( LOS接收器具有数据静音) ......................................... ............................................ 25
F
IGURE
18. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
R
X
静音F
油膏
................................................................................................... 25
3.0发送通道线路接口............................................. .................................................. .. 26
F
IGURE
19. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
T
RANSMIT
P
ATH
......................................................................................................... 26
3.1 TCLK / TPOS / TNEG数字输入............................................................................................................ 26
F
IGURE
20. T
RANSMIT
D
ATA
S
AMPLED ON
F
奥林
E
作者: DGE
TCLK...................................................................................................... 26
F
IGURE
21. T
RANSMIT
D
ATA
S
AMPLED ON
R
伊辛
E
作者: DGE
TCLK........................................................................................................ 26
3.2 HDB3 / B8ZS编码器.................................................................................................................................. 27
T
ABLE
7: T
即时通信
S
PECIFICATIONS FOR
TCLK/TPOS/TNEG.................................................................................................................. 27
T
ABLE
8: E
作者XAMPLES
HDB3 ê
NCODING
............................................................................................................................................ 27
T
ABLE
9: E
作者XAMPLES
B8ZS ê
NCODING
............................................................................................................................................. 27
3.3传输抖动衰减器............................................................................................................... 28
3.4 TAOS (发送全1) ..................................................................................................................... 28
F
IGURE
22. TAOS (T
RANSMIT
A
LL
O
NES
) ............................................................................................................................................ 28
3.5 TRANSMIT诊断功能.......................................................................................................... 28
T
ABLE
10: M
AXIMUM
G
AP
W
ID FOR
M
ULTIPLEXER
/M
冲击片雷管
A
PPLICATIONS
......................................................................................... 28
3.5.1 ATAOS (自动传输所有ONES)......................................................................................................... 29
F
IGURE
23. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
ATAOS F
油膏
..................................................................................................... 29
3.5.2网络环路UP CODE...................................................................................................................................... 29
F
IGURE
24. N
ETWORK
L
OOP
U
P
C
ODE
G
eneration
............................................................................................................................ 29
3.5.3网络环路按下码............................................................................................................................... 29
F
IGURE
25. N
ETWORK
L
OOP
D
OWN
C
ODE
G
eneration
....................................................................................................................... 29
3.5.4 QRSS GENERATION..................................................................................................................................................三十
3.6 TRANSMIT脉冲整形器和滤清器............................................ .................................................. ..... 30
3.6.1 T1长途线路打造出来的(LBO)..................................................................................................................三十
F
IGURE
26. L
ONG
H
AUL
L
INE
B
UILD
O
UT带
-7.5
D
B一
TTENUATION
.................................................................................................... 30
T
ABLE
11: R
ANDOM
B
IT
S
EQUENCE
P
OLYNOMIALS
................................................................................................................................ 30
F
IGURE
27. L
ONG
H
AUL
L
INE
B
UILD
O
UT带
-15
D
B一
TTENUATION
..................................................................................................... 31
F
IGURE
28. L
ONG
H
AUL
L
INE
B
UILD
O
UT带
-22.5
D
B一
TTENUATION
.................................................................................................. 31
3.6.2 T1短途线路扩建( LBO ) ............................................................................................................... 32
3.6.3任意脉冲发生器T1和E1 ........................................ .................................................. ..... 32
F
IGURE
29. A
RBITRARY
P
ULSE
S
EGMENT
A
SSIGNMENT
......................................................................................................................... 32
3.7 DMO (数字显示器输出) ............................................................................................................. 32
T
ABLE
12: S
HORT
H
AUL
L
INE
B
UILD
O
UT
.............................................................................................................................................. 32
3.8线路终端( TTIP / TRING ) ............................................................................................................... 33
F
IGURE
30. T
YPICAL
C
ONNECTION
D
IAGRAM
U
I
NTERNAL
T
发芽
......................................................................................... 33
4.0 T1 / E1应用........................................................................................................................ 34
4.1环回诊断.......................................................................................................................... 34
4.1.1本地模拟环回.................................................................................................................................. 34
F
IGURE
31. S
IMPLIFIED
B
LOCK
D
作者IAGRAM
L
OCAL
A
NALOG
L
OOPBACK
................................................................................................ 34
4.1.2远方返回................................................................................................................................................ 34
F
IGURE
32. S
IMPLIFIED
B
LOCK
D
作者IAGRAM
R
EMOTE
L
OOPBACK
.......................................................................................................... 34
4.1.3数字环................................................................................................................................................. 35
F
IGURE
33. S
IMPLIFIED
B
LOCK
D
作者IAGRAM
D
IGITAL
L
OOPBACK
........................................................................................................... 35
4.1.4双返回..................................................................................................................................................... 35
F
IGURE
34. S
IMPLIFIED
B
LOCK
D
作者IAGRAM
D
UAL
L
OOPBACK
............................................................................................................... 35
4.2 84通道T1 / E1多路复用器/映射器应用....................................... .......................... 36
F
IGURE
35. S
IMPLIFIED
B
LOCK
D
安IAGRAM
84-C
HANNEL
A
PPLICATION
........................................................................................... 36
T
ABLE
13: C
HIP
S
ELECT
A
SSIGNMENTS
................................................................................................................................................ 36
4.3线卡冗余.......................................................................................................................... 37
4.3.1 1 : 1和1 + 1冗余无继电器..................................... .................................................. ............. 37
1 4.3.2传送接口: 1和1 + 1冗余.................................... .............................................. 37
F
IGURE
36. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
T
RANSMIT
I
用于覆盖整个院落
1:1
1+1 R
EDUNDANCY
................................................ 37
4.3.3接收接口1 : 1和1 + 1冗余.................................... ................................................. 37
F
IGURE
37. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
R
ECEIVE
I
用于覆盖整个院落
1:1
1+1 R
EDUNDANCY
.................................................. 38
4.3.4 N + 1冗余使用外部继电器........................................ .................................................. ......... 38
具有N + 1冗余4.3.5传送接口........................................ .................................................. ...... 39
F
IGURE
38. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
T
RANSMIT
I
用于覆盖整个院落
N + 1 R
EDUNDANCY
............................................................ 39
4.3.6接收接口N + 1冗余........................................ .................................................. ......... 40
F
IGURE
39. S
IMPLIFIED
B
LOCK
D
的作者IAGRAM
R
ECEIVE
I
用于覆盖整个院落
N + 1 R
EDUNDANCY
.............................................................. 40
4.4停电保护.................................................................................................................. 41
4.5过压和过流保护............................................. .................................. 41
4.6非侵入式监测.................................................................................................................... 41
II
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