高级数据表
2001年9月
CelXpres
T8207
ATM互连
目录
（续）
目录
页面
11 SDRAM Interface.............................................................................................................................................. 64
11.1记忆Configuration............................................................................................................................. 64
11.2的通电Sequence................................................................................................................................. 64
11.3 SDRAM接口时序........................................................................................................................ 65
11.4排队.................................................................................................................................................. 66
11.5 SDRAM刷新..................................................................................................................................... 72
11.6 SDRAM Throughput................................................................................................................................ 73
12交通Management.......................................................................................................................................... 74
12.1元丢失优先权(CLP)........................................................................................................................... 74
12.2前向拥塞通知（ FECN ） .......................................... ......................................... 74
12.3部分分组丢弃（ PPD ） .................................................................................................................. 74
13 JTAG测试访问端口.................................................................................................................................... 75
13.1指令寄存器................................................................................................................................. 75
13.2边界扫描寄存器......................................................................................................................... 76
14 Registers........................................................................................................................................................... 79
14.1注册Types........................................................................................................................................ 79
14.2直接存储器存取寄存器............................................................................................................ 82
14.2.1小尾数格式（ big_end = 0 ）的扩展内存访问
寄存器30H - 37H ................................................................................................................... 86
14.2.2 big-endian格式（ big_end = 1）扩展内存访问
寄存器30H - 37H ................................................................................................................... 88
14.2.3通用I / O控制寄存器....................................... .............................................. 90
14.2.4对照细胞.............................................................................................................................. 91
14.2.5组播回忆.................................................................................................................... 92
14.3扩展内存Registers................................................................................................................... 93
14.3.1主要寄存器........................................................................................................................... 93
14.3.2 UTOPIA寄存器................................................................................................................... 106
14.3.2.1 TX UTOPIA配置............................................ ............................................. 108
14.3.2.2 TX UTOPIA监控............................................ .................................................. 125
14.3.2.3接收UTOPIA Monitoring.............................................................................................. 126
14.3.3 SDRAM寄存器.................................................................................................................... 128
14.3.3.1 SDRAM控制内存............................................ ............................................... 135
14.3.4各种内部存储器....................................................................................................... 137
14.3.4.1控制细胞记忆............................................ .................................................. 。 137
14.3.4.2组播数记忆............................................ .......................................... 138
14.3.4.3 PPD国家记忆....................................................................................................140
14.3.5外部存储器................................................................................................................... 141
14.3.5.1查询翻译记忆.......................................... .......................................... 141
14.3.5.2 SDRAM缓冲存储器............................................ ................................................. 141
15绝对最大额定值............................................................................................................................ 142
16推荐工作Conditions............................................................................................................. 142
17处理Precautions...................................................................................................................................... 142
18电气要求和特点............................................. .................................................. ... 143
18.1水晶Information................................................................................................................................ 143
18.2 DC电气特性.................................................................................................................. 144
19计时Requirements...................................................................................................................................... 145
19.1微处理器接口Timing........................................................................................................... 146
19.2 UTOPIA Timing..................................................................................................................................... 152
19.3外部LUT内存时序............................................................................................................... 153
19.4电池公共汽车Timing..................................................................................................................................... 155
19.5 SDRAM接口时序...................................................................................................................... 156
20大纲Diagram.............................................................................................................................................. 157
21订购Information....................................................................................................................................... 158
杰尔系统公司
3
QQ：2880707522 复制
