SM320VC5507-EP
SPRS613 - 2009年9月
www.ti.com
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在SM320VC5507的框图
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SM320VC5507存储器映射
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DMA_CCR位的位置
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外部总线选择寄存器
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并行端口信号路由
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并行端口( EMIF )信号接口
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I / O方向寄存器( IODIR )位布局
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I / O数据寄存器( IODATA )位布局
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地址/ GPIO使能寄存器( AGPIOEN )位布局
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地址/ GPIO方向寄存器( AGPIODIR )位布局
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地址/ GPIO数据寄存器( AGPIODATA )位布局
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EHPI GPIO使能寄存器( EHPIGPIOEN )位布局
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EHPI GPIO方向寄存器( EHPIGPIODIR )位布局
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EHPI GPIO数据寄存器( EHPIGPIODATA )位布局
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系统寄存器位的位置
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USB时钟生成
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USB PLL选择和状态寄存器位布局
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USB APLL时钟模式寄存器位布局
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IFR0和IER0位的位置
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IFR1和IER1位的位置
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设备命名为TMS320VC5507
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3.3 -V测试负载电路
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内部系统振荡器和外部晶体
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旁路模式时钟计时
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外部乘用-N时钟时序
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实时时钟振荡器的晶体
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异步存储器读时序
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异步存储器写时序
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三SDRAM读命令
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三SDRAM WRT命令
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SDRAM ACTV命令
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SDRAM DCAB命令
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SDRAM REFR命令
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SDRAM MRS命令
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SDRAM的自刷新命令
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上电复位(片上振荡器活动)时序
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上电复位(片上振荡器无效)时序
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复位时序
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外部中断时序
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唤醒从IDLE计时
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XF计时
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通用输入/输出( IOx扩展)信号配时
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TIN / TOUT计时当配置为输入
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TIN / TOUT计时当配置为输出
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McBSP的接收时序
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144引脚PGE小外形四方扁平封装(顶视图)
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版权所有 2009年,德州仪器