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位置:首页 > IC型号导航 > 首字符D型号页 > 首字符D的型号第439页 > DS2156LN
DS2156
T1 / E1 / J1单芯片收发器
TDM / UTOPIA II接口
www.maxim-ic.com
概述
该DS2156是一个软件可选的T1 ,E1或J1
单芯片收发器( SCT )短途和
长途应用。背板为用户自
可配置为TDM或UTOPIA II总线接口。
在DS2156由线路接口单元的
( LIU) ,成帧器, HDLC控制器,和一
UTOPIA / TDM背板接口,并且被控制
通过配置为Intel或8位并行口
摩托罗拉总线操作。该DS2156是引脚和
软件与DS2155兼容。
刘是由发射和接收
接口和抖动衰减器。发送
接口负责生成必要
波形,用于驱动该网络,并提供
根据不同的类型选择正确的源阻抗
媒体使用。 T1波形生成包括
DSX -1线路附加件和CSU线路外附
的-7.5dB , -15dB和-22.5db,可E1波形
代包括G.703波形为75Ω
同轴线或120Ω双绞线电缆。该接收接口
提供网络终端和恢复时钟和
来自网络的数据。
特点
完整的T1 / DS1 / ISDN - PRI / J1收发器
的功能
完整的E1 (CEPT )的PCM -30 / ISDN-PRI
收发器功能
用户可选的TDM或者UTOPIA II总线
接口
长途和短途线路接口
时钟/数据恢复和波形整形
CMI编码器/解码器,光学I / F
晶振的抖动衰减器
完全独立的发送和接收
的功能
双HDLC控制器
可编程BERT发生器与检测器
内部软件可选接收和
发送方的终端电阻
75Ω / 100Ω / 120Ω T1和E1接口
双帧弹性缓存滑动缓冲器,
连接到异步背板最多
16.384MHz
16.384MHz的, 8.192MHz的, 4.096MHz或
2.048MHz的时钟输出到合成
恢复网络时钟
产品特点继续第
1.
应用
反向复用ATM ( IMA )
T1 / E1 / J1线卡
交换机和路由器
分插复用器
订购信息
部分
DS2156L
DS2156L+
DS2156LN
DS2156LN+
DS2156G
DS2156G+
DS2156GN
DS2156GN+
温度范围
0 ° C至+ 70°C
0 ° C至+ 70°C
-40 ° C至+ 85°C
-40 ° C至+ 85°C
0 ° C至+ 70°C
0 ° C至+ 70°C
-40 ° C至+ 85°C
-40 ° C至+ 85°C
PIN- PACKAGE
100 LQFP
100 LQFP
100 LQFP
100 LQFP
100 CSBGA
100 CSBGA
100 CSBGA
100 CSBGA
乌托邦
T1/E1/J1
DS2156
T1/E1/J1
TDM / UTOPIA
背板
TDM
+表示
无铅/符合RoHS标准的封装。
注意:
该器件的一些修订可能偏离称为勘误表公布的规格。任何器件的多个版本
可能同时获得通过不同的销售渠道。欲了解器件勘误表的信息,请点击这里:
www.maxim-ic.com/errata 。
1 265
REV : 011606
DS2156
目录
1.
2.
2.1
主FEATURES............................................................................................................ 9
详细DESCRIPTION............................................................................................ 12
B
LOCK
D
IAGRAM
........................................................................................................................ 14
3.
3.1
引脚功能说明............................................... ..................................... 20
TDM B
无源底板
...................................................................................................................... 20
发送端.......................................................................................................................................20
接收端........................................................................................................................................23
3.1.1
3.1.2
3.2
3.2.1
3.2.2
UTOPIA B
US
............................................................................................................................ 26
接收端........................................................................................................................................26
发送端.......................................................................................................................................27
3.3
3.4
3.5
3.6
3.7
3.8
3.9
3.10
P
ARALLEL
C
ONTROL
P
ORT
P
插件
................................................................................................ 28
E
XTENDED
S
变体系
I
载文信息
B
US
...................................................................................... 29
U
SER
O
安输出
P
ORT
P
插件
......................................................................................................... 30
JTAG牛逼
美东时间
A
CCESS
P
ORT
P
插件
................................................................................................ 31
L
INE
I
覆盖整个院落
P
插件
................................................................................................................ 32
S
UPPLY
P
插件
............................................................................................................................. 33
L
克对
ACKAGE
P
INOUT
........................................................................................................ 34
10
MM
CSBGA P
IN
C
ONFIGURATION
.......................................................................................... 38
4.
4.1
4.2
并行端口......................................................................................................... 39
R
EGISTER
M
AP
.......................................................................................................................... 39
UTOPIA B
US
R
EGISTERS
.......................................................................................................... 45
5.
6.
6.1
6.2
6.3
6.4
6.5
特殊每通道寄存器操作............................................ ....... 46
规划模型................................................ ............................................. 48
P
OWER
-U
P
S
EQUENCE
.............................................................................................................. 49
主模式Register..........................................................................................................................49
6.1.1
I
NTERRUPT
H
ANDLING
............................................................................................................... 50
S
TATUS
R
EGISTERS
................................................................................................................... 50
I
载文信息
R
EGISTERS
.......................................................................................................... 51
I
NTERRUPT
I
载文信息
R
EGISTERS
........................................................................................ 51
7.
8.
8.1
8.2
8.3
8.4
时钟MAP.................................................................................................................. 52
T1成帧器/ FORMATTER控制和状态寄存器........................... 53
T1
ONTROL
R
EGISTERS
........................................................................................................... 53
T1 T
RANSMIT
T
RANSPARENCY
................................................................................................... 58
AIS- CI
RAI -CI摹
生成及
D
ETECTION
..................................................................... 58
T1
ECEIVE
-S
IDE
D
IGITAL
-M
ILLIWATT
C
ODE
G
eneration
......................................................... 59
9.
9.1
9.2
9.3
E1成帧器/ FORMATTER控制和状态寄存器........................... 62
E1
ONTROL
R
EGISTERS
.......................................................................................................... 62
A
UTOMATIC
A
LARM
G
eneration
............................................................................................... 66
我E1
载文信息
R
EGISTERS
.................................................................................................... 67
10.
10.1
通用控制和状态寄存器............................................. ......... 69
T1 / E1 S
TATUS
R
EGISTERS
........................................................................................................ 70
11.
12.
12.1
I / O引脚配置选项............................................ ............................... 76
环回配置................................................ .................................... 78
P
ER
-C
HANNEL
L
OOPBACK
......................................................................................................... 80
13.
13.1
错误计数寄存器............................................... ........................................ 82
L
INE
-C
ODE
V
IOLATION
C
'mount
R
EGISTER
( LCVCR ) .............................. .................... 83
T1操作........................................................................................................................................83
E1操作........................................................................................................................................83
13.1.1
13.1.2
13.2
P
ATH
C
ODE
V
IOLATION
C
'mount
R
EGISTER
( PCVCR ) .............................. ................... 85
2 265
DS2156
13.2.1
13.2.2
T1操作........................................................................................................................................85
E1操作........................................................................................................................................85
13.3
13.3.1
13.3.2
F
RAMES
O
UT
-
OF
-S
YNC
C
'mount
R
EGISTER
( FOSCR ) .............................. ................... 86
T1操作........................................................................................................................................86
E1操作........................................................................................................................................86
13.4
E- B
IT
C
OUNTER
( EBCR ) ........................................................................................................... 87
14.
15.
15.1
DS0监控功能............................................... ...................................... 88
信令操作................................................ ............................................. 90
R
ECEIVE
S
ignaling
.................................................................................................................. 90
基于处理器Signaling..................................................................................................................90
基于硬件的接收信号....................................................................................................91
15.1.1
15.1.2
15.2
15.2.1
15.2.2
15.2.3
15.2.4
T
RANSMIT
S
ignaling
................................................................................................................ 96
处理器为基础的模式.......................................................................................................................96
软件信令插入使能寄存器, E1 CAS模式........................................ ................ 100
软件信令插入使能寄存器, T1模式......................................... ........................ 102
基于硬件的模式......................................................................................................................102
16.
16.1
每信道空闲码生成............................................ .................. 103
I
DLE
-C
ODE
P
AGC软件
E
XAMPLES
..................................................................................... 104
17.
18.
18.1
通道阻滞寄存器............................................... ........................... 108
弹性存储器操作............................................... ................................. 111
R
ECEIVE
S
IDE
......................................................................................................................... 114
T1模式.............................................................................................................................................114
E1 Mode.............................................................................................................................................114
18.1.1
18.1.2
18.2
18.2.1
18.2.2
T
RANSMIT
S
IDE
....................................................................................................................... 114
T1模式.............................................................................................................................................115
E1 Mode.............................................................................................................................................115
18.3
18.4
E
LASTIC
S
TORES
I
NITIALIZATION
.............................................................................................. 115
M
最小值:
D
ELAY
M
ODE
............................................................................................................ 115
19.
20.
20.1
20.2
G.706中级CRC- 4更新( E1模式) ................................. 116
T1面向位的代码( BOC )控制器......................................... ............. 117
T
RANSMIT
中国银行....................................................................................................................... 117
R
ECEIVE
中国银行......................................................................................................................... 117
发送BOC................................................................................................................................................117
收到BOC.................................................................................................................................................117
21.
21.1
21.2
21.3
附加( SA )和国际( SI )位操作(仅限于E1 ) .......... 120
M
ETHOD
1: H
ARDWARE
S
CHEME
............................................................................................. 120
M
ETHOD
2: I
NTERNAL
R
EGISTER
S
CHEME
B
ASED ON
D
OUBLE
-F
RAME
...................................... 120
M
ETHOD
3: I
NTERNAL
R
EGISTER
S
CHEME
B
ASED ON
CRC4 M
ULTIFRAME
................................ 123
22.
22.1
22.2
HDLC控制器................................................ ............................................... 133
B
ASIC
O
PERATION
D
ETAILS
..................................................................................................... 133
HDLC
ONFIGURATION
........................................................................................................... 133
FIFO控制......................................................................................................................................137
22.2.1
22.3
22.3.1
22.3.2
22.3.3
22.3.4
22.3.5
HDLC M
APPING
...................................................................................................................... 138
接受..............................................................................................................................................138
发送.............................................................................................................................................140
FIFO信息................................................................................................................................145
接收数据包字节可用........................................................................................................145
HDLC的FIFO ......................................................................................................................................146
22.4
22.5
22.5.1
22.5.2
22.5.3
R
ECEIVE
HDLC
ODE
E
XAMPLE
.............................................................................................. 147
L
EGACY
FDL S
UPPORT
( T1 M
ODE
).......................................................................................... 147
概观............................................................................................................................................147
接收部分.................................................................................................................................147
发射部分................................................................................................................................149
3的265
DS2156
22.6
D4 / SLC -96
PERATION
.......................................................................................................... 149
23.
23.1
23.2
线路接口单元( LIU) ............................................ ......................................... 150
PERATION
...................................................................................................................... 150
R
ECEIVER
............................................................................................................................... 150
接收电平指示器和阈值中断............................................ ................................... 151
G.703接收同步信号( E1模式) ........................................ .................................... 151
监控模式.....................................................................................................................................151
23.2.1
23.2.2
23.2.3
23.3
23.3.1
23.3.2
23.3.3
23.3.4
T
变送器
.......................................................................................................................... 152
发送短路Detector/Limiter..............................................................................................152
发送开路检测.........................................................................................................152
发送BPV错误插入.............................................................................................................152
发送G.703同步信号( E1模式) ........................................ ................................... 152
23.4
23.5
23.6
23.7
23.8
23.9
MCLK P
重新依比例调整
.................................................................................................................. 153
J
伊特尔
A
TTENUATOR
............................................................................................................... 153
CMI (C
ODE
M
ARK
I
n版本
) O
PTION
.................................................................................... 153
刘成
ONTROL
R
EGISTERS
....................................................................................................... 154
R
ECOMMENDED
C
IRCUITS
........................................................................................................ 161
C
OMPONENT
S
PECIFICATIONS
.................................................................................................. 163
24.
24.1
UTOPIA背板接口............................................... ............................ 168
D
ESCRIPTION
.......................................................................................................................... 168
适用的标准目录..............................................................................................................168
缩略语和定义..................................................................................................................168
24.1.1
24.1.2
24.2
24.3
24.4
24.5
24.5.1
24.5.2
24.5.3
UTOPIA
LOCK
M
副执行秘书办公室
.......................................................................................................... 169
F
ULL
T1 / E1 M
ODE和
C
LEAR
-C
HANNEL
E1 M
ODE
................................................................. 169
F
RACTIONAL
T1/E1
模式
........................................................................................................ 170
T
RANSMIT
O
PERATION
............................................................................................................. 171
UTOPIA端发送:多路复用模式有一个发射CLAV ........................................ ............... 171
UTOPIA端发送:直接状态模式( Multitransmit CLAV ) ....................................... ............ 174
发送处理..........................................................................................................................176
24.6
24.6.1
24.6.2
24.6.3
R
ECEIVE
O
PERATION
............................................................................................................... 177
接收处理...........................................................................................................................177
UTOPIA接收方:多路复用模式,一个接收CLAV ........................................ ................. 179
UTOPIA接收方:直接状态模式( Multireceive CLAV ) ....................................... .............. 180
24.7
24.8
24.9
R
EGISTER
D
EFINITIONS
........................................................................................................... 182
R
ECEIVE
FIFO
VERRUN
........................................................................................................ 193
UTOPIA
IAGNOSTIC
L
OOPBACK
............................................................................................ 193
25.
26.
26.1
26.2
26.3
26.4
26.5
26.6
可编程带内循环代码生成和检测........ 194
BERT功能........................................................................................................ 201
S
TATUS
................................................................................................................................... 201
M
APPING
................................................................................................................................. 201
BERT
EGISTER
D
ESCRIPTIONS
............................................................................................. 203
BERT
EPETITIVE
P
ATTERN
S
ET
............................................................................................. 207
BERT B
IT
C
OUNTER
............................................................................................................... 208
BERT ê
RROR
C
OUNTER
......................................................................................................... 209
27.
27.1
有效载荷ERROR -插入函数( T1模式) ................................ 211
N
棕土
-
OF
-E
RRORS
R
EGISTERS
............................................................................................ 213
数的,左的错误Register..........................................................................................................214
27.1.1
28.
28.1
28.2
交错PCM总线操作( IBO ) ........................................... ................ 215
C
HANNEL
I
NTERLEAVE
............................................................................................................. 215
F
RAME
I
NTERLEAVE
................................................................................................................. 215
29.
30.
31.
扩展系统信息总线( ESIB ) ........................................... ......... 218
可编程背板时钟合成器....................................... 222
部分T1 / E1支持............................................. .................................... 222
4 265
DS2156
31.1
31.2
TDM B
无源底板
M
ODE
.......................................................................................................... 222
UTOPIA B
无源底板
M
ODE
.................................................................................................... 223
32.
33.
33.1
33.2
用户可编程输出引脚上............................................. ..................... 224
JTAG边界扫描结构和测试访问端口................ 225
D
ESCRIPTION
.......................................................................................................................... 225
I
NSTRUCTION
R
EGISTER
.......................................................................................................... 228
SAMPLE/PRELOAD.........................................................................................................................................229
BYPASS ...........................................................................................................................................................229
EXTEST............................................................................................................................................................229
CLAMP .............................................................................................................................................................229
HIGHZ...............................................................................................................................................................229
IDCODE............................................................................................................................................................229
33.3
33.4
33.5
33.6
T
美东时间
R
EGISTERS
..................................................................................................................... 230
B
OUNDARY
S
可以
R
EGISTER
.................................................................................................... 230
B
YPASS
R
EGISTER
.................................................................................................................. 230
I
DENTIFICATION
R
EGISTER
....................................................................................................... 230
34.
34.1
34.2
功能时序图............................................... ............................. 234
T1 M
ODE
................................................................................................................................ 234
E1 M
ODE
................................................................................................................................ 239
35.
36.
36.1
36.2
36.3
36.4
36.5
36.6
操作参数................................................ ...................................... 248
AC时序参数和图表............................................. .............. 250
M
ULTIPLEXED
B
US
AC - C
极特
................................................................................ 250
N
ONMULTIPLEXED
B
US
AC - C
极特
......................................................................... 253
R
ECEIVE
-S
IDE
AC - C
极特
...................................................................................... 256
T
RANSMIT
AC - C
极特
............................................................................................ 259
UTOPIA牛逼
RANSMIT
AC - C
极特
.............................................................................. 262
UTOPIA
ECEIVE
AC - C
极特
................................................................................ 262
37.
38.
38.1
修订历史................................................ .................................................. 。 263
封装信息................................................ ......................................... 264
100-P
IN
LQFP (56-G5002-000).............................................................................................. 264
100-B
所有
CSBGA ( 56 G6008-001 ) .......................................... .............................................. 265
38.2
5 265
DS2156
T1 / E1 / J1单芯片收发器
TDM / UTOPIA II接口
www.maxim-ic.com
概述
该DS2156是一个软件可选的T1 ,E1或J1
单芯片收发器( SCT )短途和
长途应用。背板为用户自
可配置为TDM或UTOPIA II总线接口。
在DS2156由线路接口单元的
( LIU) ,成帧器, HDLC控制器,和一
UTOPIA / TDM背板接口,并且被控制
通过配置为Intel或8位并行口
摩托罗拉总线操作。该DS2156是引脚和
软件与DS2155兼容。
刘是由发射和接收
接口和抖动衰减器。发送
接口负责生成必要
波形,用于驱动该网络,并提供
根据不同的类型选择正确的源阻抗
媒体使用。 T1波形生成包括
DSX -1线路附加件和CSU线路外附
的-7.5dB , -15dB和-22.5db,可E1波形
代包括G.703波形为75Ω
同轴线或120Ω双绞线电缆。该接收接口
提供网络终端和恢复时钟和
来自网络的数据。
特点
§
§
§
§
§
§
§
§
§
§
§
§
完整的T1 / DS1 / ISDN - PRI / J1收发器
的功能
完整的E1 (CEPT )的PCM -30 / ISDN-PRI
收发器功能
用户可选的TDM或者UTOPIA II总线
接口
长途和短途线路接口
时钟/数据恢复和波形整形
CMI编码器/解码器,光学I / F
晶振的抖动衰减器
完全独立的发送和接收
的功能
双HDLC控制器
可编程BERT发生器与检测器
内部软件可选接收和
发送方的终端电阻
75Ω / 100Ω / 120Ω T1和E1接口
双帧弹性缓存滑动缓冲器,
连接到异步背板最多
16.384MHz
16.384MHz的, 8.192MHz的, 4.096MHz或
2.048MHz的时钟输出到合成
恢复网络时钟
应用
反向复用ATM ( IMA )
T1 / E1 / J1线卡
交换机和路由器
分插复用器
产品特点继续第8页。
订购信息
部分
DS2156L
DS2156LN
温度范围
0 ° C至+ 70°C
-40 ° C至+ 85°C
PIN- PACKAGE
100 LQFP
100 LQFP
乌托邦
T1/E1/J1
DS2156
T1/E1/J1
TDM / UTOPIA
背板
TDM
注意:
该器件的一些修订可能偏离称为勘误表公布的规格。任何器件的多个版本
可能同时获得通过不同的销售渠道。欲了解器件勘误表的信息,请点击这里: www.maxim-ic.com/errata 。
1 262
110502
DS2156
目录
1.
2.
主FEATURES........................................................................................................................................8
详细DESCRIPTION......................................................................................................................11
2.1 B
LOCK
D
IAGRAM
...........................................................................................................................................13
F
IGURE
2-1. B
LOCK
D
IAGRAM
................................................................................................................................13
F
IGURE
2-2. R
ECEIVE和
T
RANSMIT
刘( TDM B
无源底板
E
NABLED
)...........................................................14
F
IGURE
2-3. R
ECEIVE和
T
RANSMIT
刘( UTOPIA B
无源底板
E
NABLED
).....................................................15
F
IGURE
2-4. R
ECEIVE和
T
RANSMIT
F
RAMER
/HDLC..........................................................................................16
F
IGURE
2-5. B
无源底板
I
覆盖整个院落
( TDM B
无源底板
E
NABLED
) ...................................................................17
F
IGURE
2-6. B
无源底板
I
覆盖整个院落
( UTOPIA B
US
E
NABLED
)...........................................................................18
3.
引脚功能说明.............................................................................................................19
3.1 TDM B
无源底板
.........................................................................................................................................19
3.1.1
发送端........................................................................................................................................19
3.1.2
接收端..........................................................................................................................................22
3.2 UTOPIA B
US
.................................................................................................................................................25
3.2.1
接收端..........................................................................................................................................25
3.2.2
发送端........................................................................................................................................26
3.3 P
ARALLEL
C
ONTROL
P
ORT
P
插件
...................................................................................................................27
3.4 E
XTENDED
S
变体系
I
载文信息
B
US
........................................................................................................28
3.5 U
SER
O
安输出
P
ORT
P
插件
..............................................................................................................................29
3.6 JTAG牛逼
美东时间
A
CCESS
P
ORT
P
插件
.....................................................................................................................30
3.7 L
INE
I
覆盖整个院落
P
插件
....................................................................................................................................31
3.8 S
UPPLY
P
插件
..................................................................................................................................................32
3.9 L
克对
ACKAGE
P
INOUT
...........................................................................................................................33
T
ABLE
3 -A 。 P
IN
D
ESCRIPTION
S
ORTED BY
P
IN
N
棕土
( TDM B
无源底板
E
NABLED
) .....................................33
T
ABLE
3 -B所示。 P
IN
D
ESCRIPTION
S
ORTED BY
P
IN
N
棕土
( UTOPIA B
无源底板
E
NABLED
) ................................35
3.10
10
MM
CSBGA P
IN
C
ONFIGURATION
........................................................................................................37
F
IGURE
3-1. 10
MM
CSBGA P
IN
C
ONFIGURATION
( TDM S
IGNALS
S
HOWN
) .........................................................37
4.
并行端口.....................................................................................................................................38
4.1 R
EGISTER
M
AP
..............................................................................................................................................38
T
ABLE
4 -A 。
EGISTER
M
AP
S
ORTED BY
A
地址H1
................................................................................................38
4.2 UTOPIA B
US
R
EGISTERS
..............................................................................................................................44
T
ABLE
4 -B 。 UTOPIA
EGISTER
M
AP
.....................................................................................................................44
5.
6.
特殊每通道寄存器操作............................................ ............................. 45
编程MODEL.......................................................................................................................47
F
IGURE
6-1. P
AGC软件
S
EQUENCE
.................................................................................................................47
6.1 P
OWER
-U
P
S
EQUENCE
...................................................................................................................................48
6.1.1
主模式Register...........................................................................................................................48
6.2 I
NTERRUPT
H
ANDLING
..................................................................................................................................49
6.3 S
TATUS
R
EGISTERS
........................................................................................................................................49
6.4 I
载文信息
R
EGISTERS
.............................................................................................................................50
6.5 I
NTERRUPT
I
载文信息
R
EGISTERS
..........................................................................................................50
7.
8.
8.1
CLOCK地图..............................................................................................................................................51
F
IGURE
7-1. C
LOCK
M
AP
( TDM M
ODE
).................................................................................................................51
T1成帧器/ FORMATTER控制和状态寄存器.......................................... .... 52
T1
ONTROL
R
EGISTERS
...............................................................................................................................52
2 262
DS2156
8.2 T1 T
RANSMIT
T
RANSPARENCY
.....................................................................................................................57
8.3 AIS- CI
RAI -CI摹
生成及
D
ETECTION
....................................................................................57
8.4 T1
ECEIVE
-S
IDE
D
IGITAL
-M
ILLIWATT
C
ODE
G
eneration
.......................................................................58
T
ABLE
8 -A 。 T1一
LARM
C
RITERIA
..........................................................................................................................60
9.
E1成帧器/ FORMATTER控制和状态寄存器.......................................... .... 61
9.1 E1
ONTROL
R
EGISTERS
...............................................................................................................................61
T
ABLE
9 -A 。 E1 S
YNC
/R
ESYNC
C
RITERIA
...............................................................................................................62
9.2 A
UTOMATIC
A
LARM
G
eneration
................................................................................................................65
9.3 E1我
载文信息
R
EGISTERS
........................................................................................................................66
T
ABLE
9 -B所示。 E1一
LARM
C
RITERIA
...........................................................................................................................67
10.
10.1
11.
12.
12.1
13.
通用控制和状态寄存器............................................. ............................... 68
T1 / E1 S
TATUS
R
EGISTERS
........................................................................................................................69
I / O引脚配置OPTIONS...................................................................................................75
环回配置............................................................................................................77
P
ER
-C
HANNEL
L
OOPBACK
........................................................................................................................79
错误计数寄存器.................................................................................................................81
13.1
L
INE
-C
ODE
V
IOLATION
C
'mount
R
EGISTER
(LCVCR)...............................................................................82
13.1.1 T1 Operation.........................................................................................................................................82
T
ABLE
13 -A 。 T1 L
INE
-C
ODE
V
IOLATION
C
OUNTING
O
PTIONS
..............................................................................82
13.1.2 E1 Operation.........................................................................................................................................82
T
ABLE
13 -B所示。 E1 L
INE
-C
ODE
V
IOLATION
C
OUNTING
O
PTIONS
..............................................................................82
13.2
P
ATH
C
ODE
V
IOLATION
C
'mount
R
EGISTER
( PCVCR ) .............................. ............................... 84
13.2.1 T1 Operation.........................................................................................................................................84
T
ABLE
13 -C 。 T1 P
ATH
C
ODE
V
IOLATION
C
OUNTING
A
RRANGEMENTS
................................................................84
13.2.2 E1 Operation.........................................................................................................................................84
13.3
F
RAMES
O
UT
-
OF
-S
YNC
C
'mount
R
EGISTER
(FOSCR)................................................................................85
13.3.1 T1 Operation.........................................................................................................................................85
T
ABLE
13 -D 。 T1 F
RAMES
O
UT
-
OF
-S
YNC
C
OUNTING
A
RRANGEMENTS
.................................................................85
13.3.2 E1 Operation.........................................................................................................................................85
13.4
E- B
IT
C
OUNTER
(EBCR)...........................................................................................................................86
14.
15.
DS0监控功能.............................................................................................................87
信令操作.......................................................................................................................89
15.1
R
ECEIVE
S
ignaling
.................................................................................................................................89
F
IGURE
15-1. S
IMPLIFIED
D
作者IAGRAM
R
ECEIVE
S
ignaling
P
ATH
......................................................................89
基于处理器15.1.1 Signaling...................................................................................................................89
15.1.2基于硬件的接收信号.....................................................................................................90
15.2
T
RANSMIT
S
ignaling
...............................................................................................................................95
F
IGURE
15-2. S
IMPLIFIED
D
作者IAGRAM
T
RANSMIT
S
ignaling
P
ATH
...................................................................95
15.2.1处理器的模式.........................................................................................................................95
T
ABLE
15 -A 。牛逼
IME
S
LOT
N
UMBERING
S
CHEMES
...................................................................................................96
15.2.2软件信号插入使能寄存器, E1 CAS模式..................................... ....................... 99
15.2.3软件信号插入使能寄存器, T1模式...................................... ............................ 101
基于硬件15.2.4 Mode.......................................................................................................................101
16.
每信道空闲码生成............................................ ........................................ 102
T
ABLE
16 -A 。我
DLE
-C
ODE
A
RRAY
A
地址H1
M
APPING
.........................................................................................102
16.1
I
DLE
-C
ODE
P
AGC软件
E
XAMPLES
..................................................................................................103
T
ABLE
16 -B所示。 GRIC
GTIC F
受膏
.........................................................................................................104
3的262
DS2156
17.
18.
通道阻滞寄存器..................................................................................................107
弹性存储器OPERATION..........................................................................................................110
18.1
R
ECEIVE
S
IDE
..........................................................................................................................................113
18.1.1 T1模式..............................................................................................................................................113
18.1.2 E1 Mode..............................................................................................................................................113
18.2
T
RANSMIT
S
IDE
.......................................................................................................................................113
18.2.1 T1模式..............................................................................................................................................114
18.2.2 E1 Mode..............................................................................................................................................114
18.3
E
LASTIC
S
TORES
I
NITIALIZATION
...........................................................................................................114
T
ABLE
18 -A 。 ê
LASTIC
S
TORE
D
ELAY
A
压脚提升
I
NITIALIZATION
.............................................................................114
18.4
M
最小值:
D
ELAY
M
ODE
.........................................................................................................................114
19.
20.
G.706中级CRC- 4更新( E1模式) ..................................... ................ 115
T1面向位的代码( BOC )控制器......................................... ................................... 116
F
IGURE
19-1 。 CRC- 4 R
ECALCULATE
M
ETHOD
....................................................................................................115
20.1
T
RANSMIT
BOC.......................................................................................................................................116
发送BOC ................................................................................................................................................116
20.2
R
ECEIVE
中国银行.........................................................................................................................................116
收到中国银行..................................................................................................................................................116
21.
21.1
21.2
21.3
22.
附加( SA )和国际( SI )位操作(仅限于E1 ) ........................ 119
M
ETHOD
1: H
ARDWARE
S
CHEME
...........................................................................................................119
M
ETHOD
2: I
NTERNAL
R
EGISTER
S
CHEME
B
ASED ON
D
OUBLE
-F
RAME
................................................119
M
ETHOD
3: I
NTERNAL
R
EGISTER
S
CHEME
B
ASED ON
CRC4 M
ULTIFRAME
..........................................122
HDLC控制器..........................................................................................................................132
22.1
B
ASIC
O
PERATION
D
ETAILS
....................................................................................................................132
22.2
HDLC
ONFIGURATION
..........................................................................................................................132
T
ABLE
22 -A 。 HDLC
ONTROLLER
R
EGISTERS
....................................................................................................133
22.2.1 FIFO Control......................................................................................................................................136
22.3
HDLC M
APPING
......................................................................................................................................137
22.3.1 Receive................................................................................................................................................137
22.3.2发送..............................................................................................................................................139
22.3.3 FIFO信息...............................................................................................................................144
22.3.4接收数据包字节Available..........................................................................................................144
22.3.5 HDLC的FIFO ......................................................................................................................................145
22.4
R
ECEIVE
HDLC
ODE
E
XAMPLE
............................................................................................................146
22.5
L
EGACY
FDL S
UPPORT
( T1 M
ODE
)........................................................................................................146
22.5.1概述.............................................................................................................................................146
22.5.2接收部分...................................................................................................................................146
22.5.3发送部分.................................................................................................................................148
22.6
D4 / SLC -96
PERATION
..........................................................................................................................148
23.
线路接口单元( LIU) .............................................................................................................149
23.1
PERATION
......................................................................................................................................149
23.2
R
ECEIVER
................................................................................................................................................149
23.2.1接收电平指示器和阈值中断......................................... ...................................... 150
23.2.2接收G.703同步信号( E1模式) ..................................... ........................................ 150
23.2.3监控模式.....................................................................................................................................150
F
IGURE
23-1. T
YPICAL
M
onitor
A
PPLICATION
...................................................................................................150
23.3
T
变送器
.........................................................................................................................................151
23.3.1发送短路Detector/Limiter............................................................................................151
4 262
DS2156
23.3.2发送开路Detector.........................................................................................................151
23.3.3发送BPV错误插入............................................................................................................151
23.3.4发送G.703同步信号( E1模式) ..................................... ...................................... 151
23.4
MCLK P
重新依比例调整
.................................................................................................................................152
23.5
J
伊特尔
A
TTENUATOR
...............................................................................................................................152
23.6
CMI (C
ODE
M
ARK
I
n版本
) O
PTION
.................................................................................................152
F
IGURE
23-2 。 CMI
ODING
..................................................................................................................................152
23.7
刘成
ONTROL
R
EGISTERS
......................................................................................................................153
23.8
R
ECOMMENDED
C
IRCUITS
.......................................................................................................................160
F
IGURE
23-3. B
ASIC
I
覆盖整个院落
...........................................................................................................................160
F
IGURE
23-4. P
ROTECTED
I
覆盖整个院落
U
I
NTERNAL
R
ECEIVE
T
发芽
..............................................161
23.9
C
OMPONENT
S
PECIFICATIONS
.................................................................................................................162
T
ABLE
23 -A 。牛逼
RANSFORMER
S
PECIFICATIONS
.....................................................................................................162
F
IGURE
23-5 。 E1牛逼
RANSMIT
P
ULSE
T
EMPLATE
....................................................................................................163
F
IGURE
23-6. T1 T
RANSMIT
P
ULSE
T
EMPLATE
....................................................................................................163
F
IGURE
23-7. J
伊特尔
T
OLERANCE
.........................................................................................................................164
F
IGURE
23-8. J
伊特尔
T
OLERANCE
( E1 M
ODE
)......................................................................................................164
F
IGURE
23-9. J
伊特尔
A
TTENUATION
( T1 M
ODE
)..................................................................................................165
F
IGURE
23-10. J
伊特尔
A
TTENUATION
( E1 M
ODE
)................................................................................................165
F
IGURE
23-11. O
PTIONAL
C
RYSTAL
C
ONNECTIONS
.............................................................................................166
24.
UTOPIA背板接口...................................................................................................167
24.1
D
ESCRIPTION
...........................................................................................................................................167
适用24.1.1名单Standards...............................................................................................................167
24.1.2和缩略语Definitions...................................................................................................................167
24.2
UTOPIA
LOCK
M
副执行秘书办公室
.........................................................................................................................168
F
IGURE
24-1 。 UTOPIA
锁定
C
ONFIGURATIONS
.........................................................................................168
24.3
F
ULL
T1 / E1 M
ODE和
C
LEAR
-C
HANNEL
E1 M
ODE
............................................................................168
24.4
F
RACTIONAL
T1/E1
模式
......................................................................................................................169
T
ABLE
24 -A 。 UTOPIA
LOCK
M
ODE
C
ONFIGURATION
......................................................................................169
24.5
T
RANSMIT
O
PERATION
............................................................................................................................170
24.5.1 UTOPIA端发送:多路复用模式有一个发射CLAV ..................................... ................. 170
F
IGURE
24-2. P
OLLING
P
HASE和
S
选举
P
HASE AT
T
RANSMIT
I
覆盖整个院落
..............................................171
F
IGURE
24-3. E
Nd和
R
作者ESTART
C
ELL AT
T
RANSMIT
I
覆盖整个院落
................................................................172
F
IGURE
24-4. T
RANSMISSION TO
PHY P
AUSED FOR
T
重稀土
C
YCLES
...................................................................173
24.5.2 UTOPIA端发送:直接状态模式( Multitransmit CLAV ) .................................... ............. 173
F
IGURE
24-5. E
作者XAMPLE
D
直接打
S
TATUS
I
NDICATION
, T
RANSMIT
D
IRECTION
..............................................174
24.5.3发送处理...........................................................................................................................175
F
IGURE
24-6. T
RANSMIT
C
ELL
F
...................................................................................................................175
24.6
R
ECEIVE
O
PERATION
...............................................................................................................................176
24.6.1接收处理.............................................................................................................................176
F
IGURE
24-7. C
ELL
-D
ELINEATION
S
TATE
D
IAGRAM
...........................................................................................176
F
IGURE
24-8. H
EADER
C
ORRECTION
S
TATE
M
ACHINE
........................................................................................177
24.6.2 UTOPIA接收方:多路复用模式,一个接收CLAV ..................................... ..................... 178
F
IGURE
24-9. P
OLLING
P
HASE和
S
大选中,在
R
ECEIVE
I
覆盖整个院落
............................................................178
F
IGURE
24-10. E
Nd和
R
作者ESTART
C
ELL
T
RANSMISSION AT
R
ECEIVE
I
覆盖整个院落
........................................179
24.6.3 UTOPIA接收方:直接状态模式( Multireceive CLAV ) .................................... ................. 179
F
IGURE
24-11. E
作者XAMPLE
D
直接打
S
TATUS
I
NDICATION
, R
ECEIVE
D
IRECTION
...............................................180
24.7
R
EGISTER
D
EFINITIONS
...........................................................................................................................181
24.8
R
ECEIVE
FIFO
VERRUN
........................................................................................................................192
24.9
UTOPIA
IAGNOSTIC
L
OOPBACK
..........................................................................................................192
25.
可编程带内循环代码生成和检测........................ 193
5 262
DS2156
T1 / E1 / J1单芯片收发器
TDM / UTOPIA II接口
www.maxim-ic.com
概述
该DS2156是一个软件可选的T1 ,E1或J1
单芯片收发器( SCT )短途和
长途应用。背板为用户自
可配置为TDM或UTOPIA II总线接口。
在DS2156由线路接口单元的
( LIU) ,成帧器, HDLC控制器,和一
UTOPIA / TDM背板接口,并且被控制
通过配置为Intel或8位并行口
摩托罗拉总线操作。该DS2156是引脚和
软件与DS2155兼容。
刘是由发射和接收
接口和抖动衰减器。发送
接口负责生成必要
波形,用于驱动该网络,并提供
根据不同的类型选择正确的源阻抗
媒体使用。 T1波形生成包括
DSX -1线路附加件和CSU线路外附
的-7.5dB , -15dB和-22.5db,可E1波形
代包括G.703波形为75Ω
同轴线或120Ω双绞线电缆。该接收接口
提供网络终端和恢复时钟和
来自网络的数据。
特点
§
§
§
§
§
§
§
§
§
§
§
§
完整的T1 / DS1 / ISDN - PRI / J1收发器
的功能
完整的E1 (CEPT )的PCM -30 / ISDN-PRI
收发器功能
用户可选的TDM或者UTOPIA II总线
接口
长途和短途线路接口
时钟/数据恢复和波形整形
CMI编码器/解码器,光学I / F
晶振的抖动衰减器
完全独立的发送和接收
的功能
双HDLC控制器
可编程BERT发生器与检测器
内部软件可选接收和
发送方的终端电阻
75Ω / 100Ω / 120Ω T1和E1接口
双帧弹性缓存滑动缓冲器,
连接到异步背板最多
16.384MHz
16.384MHz的, 8.192MHz的, 4.096MHz或
2.048MHz的时钟输出到合成
恢复网络时钟
应用
反向复用ATM ( IMA )
T1 / E1 / J1线卡
交换机和路由器
分插复用器
产品特点继续第8页。
订购信息
部分
DS2156L
DS2156LN
温度范围
0 ° C至+ 70°C
-40 ° C至+ 85°C
PIN- PACKAGE
100 LQFP
100 LQFP
乌托邦
T1/E1/J1
DS2156
T1/E1/J1
TDM / UTOPIA
背板
TDM
注意:
该器件的一些修订可能偏离称为勘误表公布的规格。任何器件的多个版本
可能同时获得通过不同的销售渠道。欲了解器件勘误表的信息,请点击这里: www.maxim-ic.com/errata 。
1 262
110502
DS2156
目录
1.
2.
主FEATURES........................................................................................................................................8
详细DESCRIPTION......................................................................................................................11
2.1 B
LOCK
D
IAGRAM
...........................................................................................................................................13
F
IGURE
2-1. B
LOCK
D
IAGRAM
................................................................................................................................13
F
IGURE
2-2. R
ECEIVE和
T
RANSMIT
刘( TDM B
无源底板
E
NABLED
)...........................................................14
F
IGURE
2-3. R
ECEIVE和
T
RANSMIT
刘( UTOPIA B
无源底板
E
NABLED
).....................................................15
F
IGURE
2-4. R
ECEIVE和
T
RANSMIT
F
RAMER
/HDLC..........................................................................................16
F
IGURE
2-5. B
无源底板
I
覆盖整个院落
( TDM B
无源底板
E
NABLED
) ...................................................................17
F
IGURE
2-6. B
无源底板
I
覆盖整个院落
( UTOPIA B
US
E
NABLED
)...........................................................................18
3.
引脚功能说明.............................................................................................................19
3.1 TDM B
无源底板
.........................................................................................................................................19
3.1.1
发送端........................................................................................................................................19
3.1.2
接收端..........................................................................................................................................22
3.2 UTOPIA B
US
.................................................................................................................................................25
3.2.1
接收端..........................................................................................................................................25
3.2.2
发送端........................................................................................................................................26
3.3 P
ARALLEL
C
ONTROL
P
ORT
P
插件
...................................................................................................................27
3.4 E
XTENDED
S
变体系
I
载文信息
B
US
........................................................................................................28
3.5 U
SER
O
安输出
P
ORT
P
插件
..............................................................................................................................29
3.6 JTAG牛逼
美东时间
A
CCESS
P
ORT
P
插件
.....................................................................................................................30
3.7 L
INE
I
覆盖整个院落
P
插件
....................................................................................................................................31
3.8 S
UPPLY
P
插件
..................................................................................................................................................32
3.9 L
克对
ACKAGE
P
INOUT
...........................................................................................................................33
T
ABLE
3 -A 。 P
IN
D
ESCRIPTION
S
ORTED BY
P
IN
N
棕土
( TDM B
无源底板
E
NABLED
) .....................................33
T
ABLE
3 -B所示。 P
IN
D
ESCRIPTION
S
ORTED BY
P
IN
N
棕土
( UTOPIA B
无源底板
E
NABLED
) ................................35
3.10
10
MM
CSBGA P
IN
C
ONFIGURATION
........................................................................................................37
F
IGURE
3-1. 10
MM
CSBGA P
IN
C
ONFIGURATION
( TDM S
IGNALS
S
HOWN
) .........................................................37
4.
并行端口.....................................................................................................................................38
4.1 R
EGISTER
M
AP
..............................................................................................................................................38
T
ABLE
4 -A 。
EGISTER
M
AP
S
ORTED BY
A
地址H1
................................................................................................38
4.2 UTOPIA B
US
R
EGISTERS
..............................................................................................................................44
T
ABLE
4 -B 。 UTOPIA
EGISTER
M
AP
.....................................................................................................................44
5.
6.
特殊每通道寄存器操作............................................ ............................. 45
编程MODEL.......................................................................................................................47
F
IGURE
6-1. P
AGC软件
S
EQUENCE
.................................................................................................................47
6.1 P
OWER
-U
P
S
EQUENCE
...................................................................................................................................48
6.1.1
主模式Register...........................................................................................................................48
6.2 I
NTERRUPT
H
ANDLING
..................................................................................................................................49
6.3 S
TATUS
R
EGISTERS
........................................................................................................................................49
6.4 I
载文信息
R
EGISTERS
.............................................................................................................................50
6.5 I
NTERRUPT
I
载文信息
R
EGISTERS
..........................................................................................................50
7.
8.
8.1
CLOCK地图..............................................................................................................................................51
F
IGURE
7-1. C
LOCK
M
AP
( TDM M
ODE
).................................................................................................................51
T1成帧器/ FORMATTER控制和状态寄存器.......................................... .... 52
T1
ONTROL
R
EGISTERS
...............................................................................................................................52
2 262
DS2156
8.2 T1 T
RANSMIT
T
RANSPARENCY
.....................................................................................................................57
8.3 AIS- CI
RAI -CI摹
生成及
D
ETECTION
....................................................................................57
8.4 T1
ECEIVE
-S
IDE
D
IGITAL
-M
ILLIWATT
C
ODE
G
eneration
.......................................................................58
T
ABLE
8 -A 。 T1一
LARM
C
RITERIA
..........................................................................................................................60
9.
E1成帧器/ FORMATTER控制和状态寄存器.......................................... .... 61
9.1 E1
ONTROL
R
EGISTERS
...............................................................................................................................61
T
ABLE
9 -A 。 E1 S
YNC
/R
ESYNC
C
RITERIA
...............................................................................................................62
9.2 A
UTOMATIC
A
LARM
G
eneration
................................................................................................................65
9.3 E1我
载文信息
R
EGISTERS
........................................................................................................................66
T
ABLE
9 -B所示。 E1一
LARM
C
RITERIA
...........................................................................................................................67
10.
10.1
11.
12.
12.1
13.
通用控制和状态寄存器............................................. ............................... 68
T1 / E1 S
TATUS
R
EGISTERS
........................................................................................................................69
I / O引脚配置OPTIONS...................................................................................................75
环回配置............................................................................................................77
P
ER
-C
HANNEL
L
OOPBACK
........................................................................................................................79
错误计数寄存器.................................................................................................................81
13.1
L
INE
-C
ODE
V
IOLATION
C
'mount
R
EGISTER
(LCVCR)...............................................................................82
13.1.1 T1 Operation.........................................................................................................................................82
T
ABLE
13 -A 。 T1 L
INE
-C
ODE
V
IOLATION
C
OUNTING
O
PTIONS
..............................................................................82
13.1.2 E1 Operation.........................................................................................................................................82
T
ABLE
13 -B所示。 E1 L
INE
-C
ODE
V
IOLATION
C
OUNTING
O
PTIONS
..............................................................................82
13.2
P
ATH
C
ODE
V
IOLATION
C
'mount
R
EGISTER
( PCVCR ) .............................. ............................... 84
13.2.1 T1 Operation.........................................................................................................................................84
T
ABLE
13 -C 。 T1 P
ATH
C
ODE
V
IOLATION
C
OUNTING
A
RRANGEMENTS
................................................................84
13.2.2 E1 Operation.........................................................................................................................................84
13.3
F
RAMES
O
UT
-
OF
-S
YNC
C
'mount
R
EGISTER
(FOSCR)................................................................................85
13.3.1 T1 Operation.........................................................................................................................................85
T
ABLE
13 -D 。 T1 F
RAMES
O
UT
-
OF
-S
YNC
C
OUNTING
A
RRANGEMENTS
.................................................................85
13.3.2 E1 Operation.........................................................................................................................................85
13.4
E- B
IT
C
OUNTER
(EBCR)...........................................................................................................................86
14.
15.
DS0监控功能.............................................................................................................87
信令操作.......................................................................................................................89
15.1
R
ECEIVE
S
ignaling
.................................................................................................................................89
F
IGURE
15-1. S
IMPLIFIED
D
作者IAGRAM
R
ECEIVE
S
ignaling
P
ATH
......................................................................89
基于处理器15.1.1 Signaling...................................................................................................................89
15.1.2基于硬件的接收信号.....................................................................................................90
15.2
T
RANSMIT
S
ignaling
...............................................................................................................................95
F
IGURE
15-2. S
IMPLIFIED
D
作者IAGRAM
T
RANSMIT
S
ignaling
P
ATH
...................................................................95
15.2.1处理器的模式.........................................................................................................................95
T
ABLE
15 -A 。牛逼
IME
S
LOT
N
UMBERING
S
CHEMES
...................................................................................................96
15.2.2软件信号插入使能寄存器, E1 CAS模式..................................... ....................... 99
15.2.3软件信号插入使能寄存器, T1模式...................................... ............................ 101
基于硬件15.2.4 Mode.......................................................................................................................101
16.
每信道空闲码生成............................................ ........................................ 102
T
ABLE
16 -A 。我
DLE
-C
ODE
A
RRAY
A
地址H1
M
APPING
.........................................................................................102
16.1
I
DLE
-C
ODE
P
AGC软件
E
XAMPLES
..................................................................................................103
T
ABLE
16 -B所示。 GRIC
GTIC F
受膏
.........................................................................................................104
3的262
DS2156
17.
18.
通道阻滞寄存器..................................................................................................107
弹性存储器OPERATION..........................................................................................................110
18.1
R
ECEIVE
S
IDE
..........................................................................................................................................113
18.1.1 T1模式..............................................................................................................................................113
18.1.2 E1 Mode..............................................................................................................................................113
18.2
T
RANSMIT
S
IDE
.......................................................................................................................................113
18.2.1 T1模式..............................................................................................................................................114
18.2.2 E1 Mode..............................................................................................................................................114
18.3
E
LASTIC
S
TORES
I
NITIALIZATION
...........................................................................................................114
T
ABLE
18 -A 。 ê
LASTIC
S
TORE
D
ELAY
A
压脚提升
I
NITIALIZATION
.............................................................................114
18.4
M
最小值:
D
ELAY
M
ODE
.........................................................................................................................114
19.
20.
G.706中级CRC- 4更新( E1模式) ..................................... ................ 115
T1面向位的代码( BOC )控制器......................................... ................................... 116
F
IGURE
19-1 。 CRC- 4 R
ECALCULATE
M
ETHOD
....................................................................................................115
20.1
T
RANSMIT
BOC.......................................................................................................................................116
发送BOC ................................................................................................................................................116
20.2
R
ECEIVE
中国银行.........................................................................................................................................116
收到中国银行..................................................................................................................................................116
21.
21.1
21.2
21.3
22.
附加( SA )和国际( SI )位操作(仅限于E1 ) ........................ 119
M
ETHOD
1: H
ARDWARE
S
CHEME
...........................................................................................................119
M
ETHOD
2: I
NTERNAL
R
EGISTER
S
CHEME
B
ASED ON
D
OUBLE
-F
RAME
................................................119
M
ETHOD
3: I
NTERNAL
R
EGISTER
S
CHEME
B
ASED ON
CRC4 M
ULTIFRAME
..........................................122
HDLC控制器..........................................................................................................................132
22.1
B
ASIC
O
PERATION
D
ETAILS
....................................................................................................................132
22.2
HDLC
ONFIGURATION
..........................................................................................................................132
T
ABLE
22 -A 。 HDLC
ONTROLLER
R
EGISTERS
....................................................................................................133
22.2.1 FIFO Control......................................................................................................................................136
22.3
HDLC M
APPING
......................................................................................................................................137
22.3.1 Receive................................................................................................................................................137
22.3.2发送..............................................................................................................................................139
22.3.3 FIFO信息...............................................................................................................................144
22.3.4接收数据包字节Available..........................................................................................................144
22.3.5 HDLC的FIFO ......................................................................................................................................145
22.4
R
ECEIVE
HDLC
ODE
E
XAMPLE
............................................................................................................146
22.5
L
EGACY
FDL S
UPPORT
( T1 M
ODE
)........................................................................................................146
22.5.1概述.............................................................................................................................................146
22.5.2接收部分...................................................................................................................................146
22.5.3发送部分.................................................................................................................................148
22.6
D4 / SLC -96
PERATION
..........................................................................................................................148
23.
线路接口单元( LIU) .............................................................................................................149
23.1
PERATION
......................................................................................................................................149
23.2
R
ECEIVER
................................................................................................................................................149
23.2.1接收电平指示器和阈值中断......................................... ...................................... 150
23.2.2接收G.703同步信号( E1模式) ..................................... ........................................ 150
23.2.3监控模式.....................................................................................................................................150
F
IGURE
23-1. T
YPICAL
M
onitor
A
PPLICATION
...................................................................................................150
23.3
T
变送器
.........................................................................................................................................151
23.3.1发送短路Detector/Limiter............................................................................................151
4 262
DS2156
23.3.2发送开路Detector.........................................................................................................151
23.3.3发送BPV错误插入............................................................................................................151
23.3.4发送G.703同步信号( E1模式) ..................................... ...................................... 151
23.4
MCLK P
重新依比例调整
.................................................................................................................................152
23.5
J
伊特尔
A
TTENUATOR
...............................................................................................................................152
23.6
CMI (C
ODE
M
ARK
I
n版本
) O
PTION
.................................................................................................152
F
IGURE
23-2 。 CMI
ODING
..................................................................................................................................152
23.7
刘成
ONTROL
R
EGISTERS
......................................................................................................................153
23.8
R
ECOMMENDED
C
IRCUITS
.......................................................................................................................160
F
IGURE
23-3. B
ASIC
I
覆盖整个院落
...........................................................................................................................160
F
IGURE
23-4. P
ROTECTED
I
覆盖整个院落
U
I
NTERNAL
R
ECEIVE
T
发芽
..............................................161
23.9
C
OMPONENT
S
PECIFICATIONS
.................................................................................................................162
T
ABLE
23 -A 。牛逼
RANSFORMER
S
PECIFICATIONS
.....................................................................................................162
F
IGURE
23-5 。 E1牛逼
RANSMIT
P
ULSE
T
EMPLATE
....................................................................................................163
F
IGURE
23-6. T1 T
RANSMIT
P
ULSE
T
EMPLATE
....................................................................................................163
F
IGURE
23-7. J
伊特尔
T
OLERANCE
.........................................................................................................................164
F
IGURE
23-8. J
伊特尔
T
OLERANCE
( E1 M
ODE
)......................................................................................................164
F
IGURE
23-9. J
伊特尔
A
TTENUATION
( T1 M
ODE
)..................................................................................................165
F
IGURE
23-10. J
伊特尔
A
TTENUATION
( E1 M
ODE
)................................................................................................165
F
IGURE
23-11. O
PTIONAL
C
RYSTAL
C
ONNECTIONS
.............................................................................................166
24.
UTOPIA背板接口...................................................................................................167
24.1
D
ESCRIPTION
...........................................................................................................................................167
适用24.1.1名单Standards...............................................................................................................167
24.1.2和缩略语Definitions...................................................................................................................167
24.2
UTOPIA
LOCK
M
副执行秘书办公室
.........................................................................................................................168
F
IGURE
24-1 。 UTOPIA
锁定
C
ONFIGURATIONS
.........................................................................................168
24.3
F
ULL
T1 / E1 M
ODE和
C
LEAR
-C
HANNEL
E1 M
ODE
............................................................................168
24.4
F
RACTIONAL
T1/E1
模式
......................................................................................................................169
T
ABLE
24 -A 。 UTOPIA
LOCK
M
ODE
C
ONFIGURATION
......................................................................................169
24.5
T
RANSMIT
O
PERATION
............................................................................................................................170
24.5.1 UTOPIA端发送:多路复用模式有一个发射CLAV ..................................... ................. 170
F
IGURE
24-2. P
OLLING
P
HASE和
S
选举
P
HASE AT
T
RANSMIT
I
覆盖整个院落
..............................................171
F
IGURE
24-3. E
Nd和
R
作者ESTART
C
ELL AT
T
RANSMIT
I
覆盖整个院落
................................................................172
F
IGURE
24-4. T
RANSMISSION TO
PHY P
AUSED FOR
T
重稀土
C
YCLES
...................................................................173
24.5.2 UTOPIA端发送:直接状态模式( Multitransmit CLAV ) .................................... ............. 173
F
IGURE
24-5. E
作者XAMPLE
D
直接打
S
TATUS
I
NDICATION
, T
RANSMIT
D
IRECTION
..............................................174
24.5.3发送处理...........................................................................................................................175
F
IGURE
24-6. T
RANSMIT
C
ELL
F
...................................................................................................................175
24.6
R
ECEIVE
O
PERATION
...............................................................................................................................176
24.6.1接收处理.............................................................................................................................176
F
IGURE
24-7. C
ELL
-D
ELINEATION
S
TATE
D
IAGRAM
...........................................................................................176
F
IGURE
24-8. H
EADER
C
ORRECTION
S
TATE
M
ACHINE
........................................................................................177
24.6.2 UTOPIA接收方:多路复用模式,一个接收CLAV ..................................... ..................... 178
F
IGURE
24-9. P
OLLING
P
HASE和
S
大选中,在
R
ECEIVE
I
覆盖整个院落
............................................................178
F
IGURE
24-10. E
Nd和
R
作者ESTART
C
ELL
T
RANSMISSION AT
R
ECEIVE
I
覆盖整个院落
........................................179
24.6.3 UTOPIA接收方:直接状态模式( Multireceive CLAV ) .................................... ................. 179
F
IGURE
24-11. E
作者XAMPLE
D
直接打
S
TATUS
I
NDICATION
, R
ECEIVE
D
IRECTION
...............................................180
24.7
R
EGISTER
D
EFINITIONS
...........................................................................................................................181
24.8
R
ECEIVE
FIFO
VERRUN
........................................................................................................................192
24.9
UTOPIA
IAGNOSTIC
L
OOPBACK
..........................................................................................................192
25.
可编程带内循环代码生成和检测........................ 193
5 262
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