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DAVICOM半导体公司

DM9332

10 / 100Mbps以太网光纤/双绞线

单芯片收发器

数据表

初步

版本： DM9332 - DS- P01

2012年3月5日

DM9332

10 / 100Mbps以太网光纤/双绞线单芯片收发器

内容

一般DESCRIPTION............................................................................................... 8

BLOCK DIAGRAM........................................................................................................... 8

特点...................................................................................................................... 9

引脚配置................................................ .................................................. 10

引脚说明........................................................................................................ 11

5.1 P2 MII / RMII / MII反向接口.......................................................................................................... 11

5.1.1 MII接口........................................................................................................................................... 11

5.1.2 RMII Interfaces......................................................................................................................................... 11

5.1.3反向MII接口............................................................................................................................. 12

5.2 EEPROM接口....................................................................................................................................... 12

5.3 LED引脚......................................................................................................................................................... 12

5.4时钟Interface............................................................................................................................................... 13

5.5网络接口.......................................................................................................................................... 13

5.6其他引脚....................................................................................................................................... 13

5.7电源引脚..................................................................................................................................................... 13

5.8带针table.............................................................................................................................................. 14

控制和状态寄存器组............................................. ...................... 15

6.1 EEPROM & PHY控制寄存器（ 0BH ） ..................................................................................................... 16

初步数据表

DM9332-15-DS-P01

2012年3月5日

DM9332

10 / 100Mbps以太网光纤/双绞线单芯片收发器

6.2 EEPROM & PHY地址寄存器（ 0CH ） ......................................... .................................................. ........ 16

6.3 EPROM & PHY数据寄存器（ 0DH 0EH ） ....................................... .................................................. .......... 16

6.4供应商ID寄存器（ 28H 29H ） ..................................................................................................................... 16

6.5端口2驱动能力注册(3AH)...................................................................................................... 16

6.6开关控制寄存器(52H)...................................................................................................................... 17

6.7 VLAN控制寄存器（ 53H ） ....................................................................................................................... 17

6.8开关状态寄存器（ 54H ） ....................................................................................................................... 17

6.9每端口控制/状态变址寄存器（ 60H ） ....................................... .................................................. .... 18

6.10每端口控制数据寄存器（ 61H ） ........................................................................................................ 18

6.11每端口的状态数据寄存器（ 62H ） .......................................................................................................... 18

6.12每端口转发控制寄存器（ 65H ） ......................................... .................................................. ....... 19

6.13每端口入口/出口控制寄存器（ 66H ） ....................................... ............................................... 20

6.14带宽控制寄存器的设置(67H)................................................................................................ 21

6.15每端口座单播端口控制寄存器（ 68H ） ....................................... ....................................... 21

6.16每端口模块端口的组播控制寄存器（ 69H ） ....................................... ..................................... 22

6.17每端口广播座端口控制寄存器（ 6AH ） ....................................... .................................. 22

6.18每端口座未知的端口控制寄存器（ 6BH ） ....................................... ................................... 22

6.19每端口优先级队列控制寄存器（ 6DH ） ........................................ ............................................... 22

6.20每端口的VLAN Tag，低字节寄存器（ 6EH ） ....................................... .................................................. .. 22

6.21每端口的VLAN Tag，高字节寄存器（ 6FH ） ....................................... .................................................. .. 23

初步数据表

DM9332-15-DS-P01

2012年3月5日

DM9332

10 / 100Mbps以太网光纤/双绞线单芯片收发器

6.22 MIB计数器端口索引寄存器(80H).................................................................................................... 23

6.23 MIB计数器数据寄存器(81H~84H)....................................................................................................... 23

6.24 VLAN分组表寄存器（ B0H BFH ） ........................................ .................................................. ... 24

6.25 TOS优先级映射寄存器(C0H~CFH).................................................................................................... 24

6.26 VLAN优先级映射寄存器（ D0H D1H ） ........................................ .................................................. ....... 27

EEPROM FORMAT........................................................................................................ 28

PHY寄存器.......................................................................................................... 31

8.1基本模式控制寄存器（ BMCR ） - 00H ........................................ .................................................. .... 32

8.2基本模式状态寄存器（ BMSR ） - 01H ........................................ .................................................. ...... 33

8.3 PHY ID标识符寄存器＃ 1 （ PHYID1 ） - 02H ...................................... .................................................. ..... 34

8.4 PHY ID标识符寄存器＃ 2 （ PHYID2 ） - 03H ...................................... .................................................. ..... 34

8.5自动协商广告寄存器（ ANAR ） - 04H ....................................... ................................... 35

8.6自动协商链路伙伴能力寄存器（ ANLPAR ） - 05H ..................................... ........................ 36

8.7自动协商扩展寄存器（ ANER ） - 06H ....................................... .......................................... 37

8.8 DAVICOM指定的配置寄存器（ DSCR ） - 10H ........................................ .............................. 37

8.9 DAVICOM指定的配置和状态寄存器（ DSCSR ） - 11H ...................................... .......... 39

8.10 10BASE -T配置/状态（ 10BTCSR ） - 12H ...................................... ............................................ 40

8.11掉电控制寄存器（ PWDOR ） - 13H ........................................ ................................................ 40

8.12 （指定配置）寄存器 - 14H .............................................................................................................. 41

8.13 DAVICOM指定的接收错误计数器寄存器（ RECR ） - 16H ...................................... ............... 42

初步数据表

DM9332-15-DS-P01

2012年3月5日

DM9332

10 / 100Mbps以太网光纤/双绞线单芯片收发器

8.14 DAVICOM指定断开计数器寄存器（ DISCR ） - 17H ....................................... ................. 42

8.15节电控制寄存器（ PSCR ） - 1DH ........................................ ................................................. 42

功能说明................................................ ....................................... 43

9.1串行管理Interface........................................................................................................................ 43

9.2开关function:............................................................................................................................................. 44

9.2.1地址学习..................................................................................................................................... 44

9.2.2应对老龄化问题.......................................................................................................................................... 44

9.2.3数据包转发................................................................................................................................... 44

9.2.4包间间隔（ IPG ） ............................................................................................................................ 44

9.2.5回退Algorithm.................................................................................................................................... 44

9.2.6晚Collision............................................................................................................................................ 44

9.2.7全双工流控.......................................................................................................................... 44

9.2.8半双工流控......................................................................................................................... 44

9.2.9分区模式.......................................................................................................................................... 45

9.2.10广播风暴Filtering....................................................................................................................... 45

9.2.11带宽Control.................................................................................................................................. 45

9.2.12端口监控支持......................................................................................................................... 45

9.2.13 VLAN支持........................................................................................................................................ 46

9.2.13.1基于端口VLAN................................................................................................................................ 46

基于802.1Q 9.2.13.2 VLAN........................................................................................................................... 46

9.2.13.3标记/取消标记........................................................................................................................................... 46

9.2.14优先支持...................................................................................................................................... 47

9.2.14.1基于端口的优先级.............................................................................................................................. 47

9.2.14.2基于802.1p Priority.......................................................................................................................... 47

基于DiffServ的9.2.14.3 Priority........................................................................................................................ 47

9.3 MII Interface.................................................................................................................................................... 48

9.3.1 MII数据接口..................................................................................................................................... 48

9.3.2 MII串行管理............................................................................................................................ 48

9.3.3串行管理接口................................................................................................................... 49

9.3.4管理界面 - 读取帧结构......................................... ............................................. 49

初步数据表

DM9332-15-DS-P01

2012年3月5日