添加收藏夹  设为首页  深圳服务热线:13751165337  13692101218
51电子网联系电话:13751165337
位置:首页 > IC型号导航 > 首字符C型号页 > 首字符C的型号第165页 > CS42448_06
CS42448
108分贝192千赫6英寸,8出CODEC
特点
6个24位A / D , 8个24位D / A转换器
ADC的动态范围
- 105分贝差
- 102分贝单端
DAC的动态范围
- 108分贝差
- 105分贝单端
ADC / DAC THD + N
- -98 dB差分
- -95分贝单端
兼容行业标准的时间
分复用(TDM)串行接口
系统采样率高达192 kHz
直流可编程ADC高通滤波器
偏移校准
对数数字音量控制
IC
& SPI
主机控制端口
支持5 V和1.8 V的逻辑电平
Popguard
技术
控制端口串行&
音频端口供电=
1.8 V至5 V
概述
该CS42448编解码器具有6多比特模拟到
数字和8的多比特数字 - 模拟Σ-Δ
转换器。该编解码器能够运行与EI型
疗法差分或单端输入和输出,在
64引脚LQFP封装。
六全差分或单端输入都可用
能够在立体声ADC1 , ADC2 , ADC3和。当
在单端模式下工作,内部MUX BE-
前ADC3可以选择多达4个单端
输入。被提供给每个ADC数字音量控制
通道,并可选择溢出检测。
所有8个DAC通道数字音量控制
并且可以与差分或单端操作
输出。
辅助串行输入,可额外2
PCM数据通道。
该CS42448可在一个64引脚LQFP封装
商业( -10 °至+ 70 °),汽车( -40°至
+ 105 ° )的成绩。 CDB42448用户Demonstra-
灰板也可用于设备的评估和
实施意见。请参阅
“订购
第64页上的信息“
对于完整的订购
信息。
该CS42448是理想的音频系统,要求广泛
动态范围,高保真和低噪音等
如A / V接收器, DVD接收器和车载音响
系统。
数字电源=
3.3 V至5 V
模拟电源=
3.3 V至5 V
电平转换器
I
2
C / SPI
软件模式
控制数据
打断
RESET
注册
CON组fi guration
ADC溢出
&时钟误差
打断
内部电压
参考
静音控制
MUTE(静音)
控制
PCM和TDM串行
接口
串行音频
输入
电平转换器
的辅助系列
音频输入
输入主
时钟
串行音频
产量
控制
数字
过滤器
ΔΣ
调制器
多位
DAC1-4和
模拟滤波器
8
8
差分或
单端
输出
高通
滤波器
数字
过滤器
多位
过采样
ADC1&2
多位
过采样
ADC3
4:2*
4
4
高通
滤波器
数字
过滤器
2
2
差分或
单端
模拟输入
*可选MUX允许多达4个单端输入选择。
http://www.cirrus.com
版权
Cirrus Logic公司, 2006年公司
(版权所有)
十一月'06
DS648F2
CS42448
目录
1.引脚说明
.................................................................................................................... 6
1.1数字I / O引脚特性........................................................................................................... 8
2.典型连接图
............................................................................................. 9
3.特性和规范............................................. ........................................ 10
推荐工作条件............................................... .................................... 10
绝对最大额定值....................................................................................................... 10
模拟输入特性(商业) ............................................ ........................ 11
模拟输入特性(汽车) ............................................ ......................... 12
ADC数字滤波器特性.............................................. ......................................... 13
模拟输出特性(商业) ............................................ .................... 14
模拟输出特性(汽车) ............................................ ..................... 15
联合DAC插值&片上模拟滤波器响应.............................. 17
切换规格 - ADC / DAC端口........................................... ................................. 18
开关特性 - AUX口............................................. .................................... 20
切换规范 - 控制端口 - IC模式.......................................... ............. 21
切换规范 - 控制端口 - SPI格式.......................................... ....... 22
DC电气特性............................................... ............................................... 23
数字接口规格&特性............................................. ........ 23
4.应用.................................................................................................................................... 24
4.1概述......................................................................................................................................... 24
4.2模拟输入.................................................................................................................................. 24
4.2.1线路电平输入................................................................................................................... 24
4.2.2 ADC3模拟输入................................................................................................................ 25
4.2.3高通滤波器和直流偏移校准....................................... .................................... 26
4.3模拟输出............................................................................................................................... 26
4.3.1初始化............................................................................................................................ 26
4.3.2输出瞬态控制....................................................................................................... 28
4.3.3 Popguard ............................................................................................................................... 28
4.3.3.1上电................................................................................................................... 28
4.3.3.2掉电.............................................................................................................. 28
4.3.4静音控制.......................................................................................................................... 28
4.3.5线路电平输出和滤波......................................... .................................................. 29
4.3.6数字音量控制........................................................................................................... 29
4.3.7去重滤波器................................................................................................................ 29
4.4系统时钟.............................................................................................................................三十
4.5编解码器的数字接口格式............................................. .................................................. .... 31
4.5.1 IS .......................................................................................................................................... 32
4.5.2左对齐.......................................................................................................................... 32
4.5.3右对齐........................................................................................................................ 32
4.5.4 OLM # 1 .................................................................................................................................. 32
4.5.5 OLM # 2 .................................................................................................................................. 33
4.5.6 TDM ....................................................................................................................................... 33
4.5.7 I / O信道分配........................................................................................................... 34
4.6 AUX端口数字接口格式............................................ .................................................. ... 34
4.6.1 IS .......................................................................................................................................... 34
4.6.2左对齐.......................................................................................................................... 34
4.7控制端口的描述和时序............................................ .................................................. 35
4.7.1 SPI模式............................................................................................................................... 35
4.7.2 IC模式................................................................................................................................ 36
4.8中断......................................................................................................................................... 37
4.9推荐的上电顺序............................................ ................................................. 37
4.10复位和供电.................................................................................................................... 38
2
DS648F2
CS42448
4.11电源,接地和PCB布局......................................... ........................................ 38
5.注册快速参考......................................................................................................... 39
6.注册说明................................................................................................................... 41
6.1存储器地址指针( MAP) ..................................................................................................... 41
6.1.1递增(增量) .................................................................................................................. 41
6.1.2存储器地址指针(MAP [ 6 : 0 ] ) .................................... ................................................. 41
6.2芯片内径和修订寄存器(地址01H ) (只读) ....................................... ................... 41
6.2.1芯片内径( CHIP_ID [3: 0])的........................................................................................................ 41
6.2.2芯片版本( REV_ID [ 3 : 0 ] ) ..................................... .................................................. .......... 41
6.3电源控制(地址02H ) ......................................................................................................... 42
6.3.1掉电对ADC ( PDN_ADCX ) ........................................ ......................................... 42
6.3.2掉电DAC双( PDN_DACX ) ........................................ ......................................... 42
6.3.3掉电( PDN ) ............................................................................................................... 42
6.4功能模式(地址03H ) ...................................................................................................... 43
6.4.1数模转换器功能模式( DAC_FM [1 :0]) .................................... .............................................. 43
6.4.2模数转换器功能模式( ADC_FM [1 :0]) .................................... .............................................. 43
6.4.3 MCLK的频率( MFREQ [2 :0]) ..................................... .................................................. .... 43
6.5接口格式(地址04H ) ........................................... .................................................. ....... 44
6.5.1冻结控制( FREEZE ) .......................................... .................................................. ....... 44
6.5.2辅助数字接口格式( AUX_DIF ) ........................................ ................................ 44
6.5.3数模转换器数字接口格式( DAC_DIF [2 :0]) ................................... .................................... 44
6.5.4模数转换器数字接口格式( ADC_DIF [2 :0]) ................................... .................................... 45
6.6 ADC控制& DAC去加重(地址05H ) ..................................... ................................... 45
6.6.1 ADC1-2高通滤波器冻结( ADC1-2_HPF FREEZE ) ................................. ................. 45
6.6.2 ADC3高通滤波器冻结( ADC3_HPF FREEZE ) ..................................... ................... 46
6.6.3 DAC去加重控制( DAC_DEM ) ....................................... ........................................ 46
6.6.4 ADC1单端模式( ADC1单) ..................................... ................................... 46
6.6.5 ADC2单端模式( ADC2单) ..................................... ................................... 46
6.6.6 ADC3单端模式( ADC3单) ..................................... ................................... 47
6.6.7模拟输入通道。 5复用器( AIN5_MUX ) ............................................. ............................ 47
6.6.8模拟输入通道。 6复用器( AIN6_MUX ) ............................................. ............................ 47
6.7过渡控制(地址06H ) ........................................... .................................................. ....... 47
6.7.1单音量控制( DAC_SNGVOL , ADC_SNGVOL ) ....................................... ............. 47
6.7.2软斜坡和零交叉控制( ADC_SZC [ 1 : 0 ] , DAC_SZC [ 1 : 0 ] ) .......................... ........ 48
6.7.3自动静音( AMUTE ) .............................................................................................................. 48
6.7.4静音ADC的串行端口( MUTE ADC_SP ) ....................................... ........................................ 49
6.8 DAC通道静音(地址07H ) .......................................... .................................................. ..... 49
6.8.1独立通道静音( AOUTX_MUTE ) ......................................... .............................. 49
6.9 AOUTX音量控制(地址08h-的0Fh ) ........................................ .................................. 49
6.9.1音量控制( AOUTX_VOL [ 7 : 0 ] ) ..................................... ................................................. 49
6.10 DAC通道反转(地址10H ) .......................................... .................................................. 50 ..
6.10.1反转信号极性( INV_AOUTX ) ......................................... ........................................... 50
6.11 AINX音量控制(地址11H - 16H) ........................................ ............................................. 50
6.11.1 AINX音量控制( AINX_VOL [ 7 : 0 ] ) .................................... .......................................... 50
6.12 ADC通道反转(地址17H) .......................................... .................................................. 50 ..
6.12.1反转信号极性( INV_AINX ) ......................................... ............................................... 50
6.13当启用时,这些位将反转各自channels.Status控制的信号极性
(地址18H) ....................................................................................................................................... 51
6.13.1中断引脚控制( INT [ 1 : 0 ] ) .................................... .................................................. ...... 51
6.14状态(地址19H) (只读) ........................................ .................................................. ...... 51
6.14.1 DAC时钟错误( DAC_CLK ERROR ) ........................................ ................................ 51
6.14.2 ADC时钟错误( ADC_CLK ERROR ) ........................................ ................................ 51
6.14.3 ADC溢出( ADCX_OVFL ) .......................................... .................................................. 。 51
6.15状态面膜(地址为1Ah ) .......................................................................................................... 52
DS648F2
3
CS42448
6.16 MUTEC引脚控制(地址1BH ) .......................................... .................................................. .. 52
6.17 MUTEC极性选择( MCPOLARITY ) ........................................... ........................................... 52
6.18静音控制ACTIVE ( MUTEC ACTIVE ) .......................................... ................................... 52
7.外部FILTERS............................................................................................................................ 53
7.1 ADC输入滤波器.............................................................................................................................. 53
7.1.1被动输入滤波器................................................................................................................ 54
7.1.2被动输入滤波器W /衰减......................................... ................................................ 54
7.2 DAC输出滤波器........................................................................................................................... 56
8. ADC滤波器PLOTS............................................................................................................................. 57
9.过滤器DAC PLOTS............................................................................................................................. 59
10.参数DEFINITIONS............................................................................................................... 61
11 。 REFERENCES..................................................................................................................................... 62
12.包装INFORMATION................................................................................................................. 63
12.1热特性............................................................................................................... 63
13.订购信息............................................................................................................... 64
14.修订历史........................................................................................................................... 64
图列表
图1.Typical连接图......................................................................................................... 9
图2.输出测试电路的最大负载......................................... .............................................. 16
图3.最大装载....................................................................................................................... 16
图4.Serial音频接口从机模式时序......................................... ......................................... 18
图5.TDM串行音频接口时序.......................................... .................................................. 18
图6.Serial音频接口主控模式时序......................................... ....................................... 19
图7.Serial音频接口从机模式时序......................................... ......................................... 20
图8.控制端口时序 - IC格式......................................... .................................................. ...... 21
图9.Control端口时序 - SPI格式......................................... .................................................. ..... 22
图10.Full量程输入......................................................................................................................... 25
图11.ADC3输入拓扑................................................................................................................ 25
图12.Audio输出初始化流程图.......................................... ............................................. 27
图13.Full量程输出...................................................................................................................... 29
图14.De加重曲线..................................................................................................................三十
图15.IS格式................................................................................................................................. 32
图16.Left对齐格式................................................................................................................. 32
图17.Right对齐格式............................................................................................................... 32
图18.One行模式# 1格式........................................................................................................ 32
图19.One行模式# 2格式........................................................................................................ 33
图20.TDM格式.............................................................................................................................. 33
图21.AUX IS格式......................................................................................................................... 34
图22.AUX左对齐格式......................................................................................................... 35
图23.Control端口时序在SPI模式......................................... .................................................. ... 36
图24.Control端口时序, IC写......................................... .................................................. ........ 36
图25.Control端口时序, IC读......................................... .................................................. ........ 37
图26.Single到差分有源输入滤波器......................................... ............................................ 53
图27.Single端有源输入滤波器......................................... .................................................. ..... 53
图28.Passive输入滤波器................................................................................................................... 54
图29.Passive输入滤波器W /衰减......................................... .................................................. .. 55
图30.Active模拟输出滤波器....................................................................................................... 56
图31.Passive模拟输出滤波器........................................... .................................................. ....... 56
图32.SSM阻带抑制.......................................................................................................... 57
图33.SSM过渡带................................................................................................................ 57
图34.SSM过渡带(详细信息) ......................................... .................................................. ........ 57
图35.SSM通带纹波.............................................................................................................. 57
4
DS648F2
CS42448
图36.DSM阻带抑制.......................................................................................................... 57
图37.DSM过渡带................................................................................................................ 57
图38.DSM过渡带(详细信息) ......................................... .................................................. ........ 58
图39.DSM通带纹波.............................................................................................................. 58
图40.QSM阻带抑制......................................................................................................... 58
图41.QSM过渡带................................................................................................................ 58
图42.QSM过渡带(详细信息) ......................................... .................................................. ........ 58
图43.QSM通带纹波.............................................................................................................. 58
图44.SSM阻带抑制.......................................................................................................... 59
图45.SSM过渡带................................................................................................................ 59
图46.SSM过渡带(详细) ......................................... .................................................. ......... 59
图47.SSM通带纹波.............................................................................................................. 59
图48.DSM阻带抑制.......................................................................................................... 59
图49.DSM过渡带................................................................................................................ 59
图50.DSM过渡带(详细) ......................................... .................................................. ......... 60
图51.DSM通带纹波.............................................................................................................. 60
图52.QSM阻带抑制......................................................................................................... 60
图53.QSM过渡带................................................................................................................ 60
图54.QSM过渡带(详细) ......................................... .................................................. ......... 60
图55.QSM通带纹波.............................................................................................................. 60
表格清单
表1. I / O电源轨............................................................................................................................. 8
表2.单速模式常用频率......................................... ....................................... 30
表3倍速模式常用频率......................................... ...................................... 30
表4.四倍速模式常用频率......................................... ........................................ 30
表5. IS , LJ , RJ时钟比率.............................................................................................................. 31
表6. OLM # 1时钟比率................................................................................................................... 31
表7. OLM # 2的时钟比率................................................................................................................... 31
表8. TDM时钟比率....................................................................................................................... 31
表9.串行音频接口信道分配.......................................... ....................................... 34
表10. MCLK频率设定为IS ,左,右对齐接口格式.......................... 43
表12. DAC数字接口格式........................................... .................................................. ..... 44
表11. MCLK频率设定为TDM & OLM接口格式...................................... ........... 44
表13. ADC数字接口格式........................................... .................................................. ..... 45
表14.示例AOUT音量设置........................................... .................................................. 49
表15.示例AIN音量设置........................................... .................................................. ..... 50
DS648F2
5
查看更多CS42448_06PDF信息
推荐型号
供货商
型号
厂家
批号
数量
封装
单价/备注
操作
    QQ: 点击这里给我发消息 QQ:2880707522 复制 点击这里给我发消息 QQ:2369405325 复制

    电话:0755-82780082
    联系人:杨小姐
    地址:深圳市福田区振兴路156号上步工业区405栋3层

    CS42448_06
    -
    -
    -
    -
    终端采购配单精选

查询更多CS42448_06供应信息

深圳市碧威特网络技术有限公司
 复制成功!