xilinx virtex-7系列的fpgas突破了以前的物理限制，使明天的
创新。超高端带宽和容量的结合提高了系统性能
解决最复杂的系统需求。不折不扣的表现是
一个可编程平台的基础，具有多功能性，在当今
竞争激烈的市场。
前所未有的吞吐量
virtex-7fpgas拥有多达96个先进的串行收发器，使设计者能够在这方面取得突破性进展。
下一代通信解决方案的带宽。先进的吞吐量使
网络基础设施的空前发展，包括
NX100G和400G光纤网络。
新的绩效里程碑
virtex-7fpgas提供高达200万个逻辑单元和超过5tmacs的dsp吞吐量。这些
资源支持大规模并行数据处理体系结构，这些体系结构对每个
时钟周期。virtex-7fpgas拥有多达88个高级串行收发器，可提供超过4bps的串行
带宽。这些能力使先进雷达的处理性能达到了新的水平，
高性能计算和先进的医学成像系统。
超越摩尔定律
Xilinx率先采用SSI技术，以实现超过速度的容量和性能增长
摩尔定律。因此，virtex-7fpgas提供的容量是之前的3.5倍以上。
世代。结合家族的内存、dsp和i/o资源，virtex-7设备建立了新的
绩效基准。
低功耗设计
业界领先的28nm HPL工艺技术实现了性能和功率的最佳平衡
对于这些下一代的fpgas。架构增强进一步降低了I/O功耗
同时增加带宽。以及xilinx设计工具软件中的智能时钟选通算法
降低有功功耗。
The Xilinx Virtex-7 Family of FPGAs breaks through previous physical limits to enable tomorrow’s
innovations. A combination of ultra high-end bandwidth and capacity boosts system performance to
address the most complex system requirements. The uncompromised performance is delivered as the
foundation of a programmable platform, with the versatility to maximize differentiation in today’s
competitive markets.
Unprecedented Throughput
With up to 96 advanced serial transceivers, the Virtex-7 FPGAs enable designers to build breakthrough
bandwidth into next-generation communications solutions. The advanced throughput enables
unprecedented advancements for network infrastructure, including the only single-FPGA solution for
Nx100G and 400G optical networking.
New Milestones in Performance
Virtex-7 FPGAs deliver up to 2 million logic cells and more than 5TMACS DSP throughput. These
resources enable massively parallel data processing architectures that perform more work with each
clock cycle. With up to 88 advanced serial transceivers, Virtex-7 FPGAs offer more than 4Tbps of serial
bandwidth. These capabilities enable new levels of processing performance for advanced RADAR,
high-performance computing, and advanced medical imaging systems.
Exceeding Moore’s Law
Xilinx pioneered SSI technology to achieve increases in capacity and performance that exceed the pace
of Moore’s Law. As a result, Virtex-7 FPGAs offer more than 3.5 times the capacity of the previous
generation. Combined with the family’s memory, DSP, and I/O resources, Virtex-7 devices establish new
performance benchmarks.
Low Power by Design
Industry-leading 28nm HPL process technology achieves the optimum balance of performance and power
for these-next generation FPGAs. Architectural enhancements further reduce I/O power consumption
while increasing bandwidth. And intelligent clock-gating algorithms in Xilinx design tool software further
reduce active power consumption.
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