AD9238高性能集成式双核双通道 模数转换器
发布时间:2018/12/29 10:57:21 访问次数:8380
ad9238是一款双通道,3 v,12位,20 msps / 40 msps / 65 msps
模数转换器(adc)。它具有双高
性能采样保持放大器(sha)和
集成电压参考。
- 51电子网公益库存:
- MC100LVE222FAG
- MC14076BCPG
- MC14082BCPG
- MC14082BDG
- MC14093BCPG
- MC14093BDTR2G
- MC14094BCPG
- MC14099BDWR2G
- MC1413DG
- MC14174BCPG
- MC14175BCPG
- MC14490DWG
- MC1488/BCA
- MC1488/BCAJC
- MC1488L
- MC1495L
- MC1496D
- MC1496G
- MC14C88BDR2
- MC14LC54080DW
ad9238采用多级
具有输出纠错的差分流水线架构
逻辑提供12位精度并保证不丢失
代码在整个工作温度范围内最高可达
65 msps数据速率。宽带宽,差分sha
允许各种用户可选择的输入范围和偏移,
包括单端应用程序。适合各种用途http://wobo666.51dzw.com
应用程序,包括切换全尺寸的多路复用系统
连续通道中的电压电平和采样
输入频率远远超过奈奎斯特速率。
双单端时钟输入用于控制所有内部
转换周期。可以使用工作循环稳定器
允许,补偿时钟占空比的广泛变化
转换器保持优异的性能。数字化
输出数据以直接二进制或二进制形式显示
补充格式。超出范围的信号表示溢出
条件,可以与最重要的位一起使用
确定低或高溢出。
the ad9238 is a dual, 3 v, 12-bit, 20 msps/40 msps/65 msps
analog-to-digital converter (adc). it features dual high
performance sample-and-hold amplifiers (shas) and an
integrated voltage reference. the ad9238 uses a multistage
differential pipelined architecture with output error correction
logic to provide 12-bit accuracy and to guarantee no missing
codes over the full operating temperature range at up to
65 msps data rates. the wide bandwidth, differential sha
allows for a variety of user-selectable input ranges and offsets,
including single-ended applications. it is suitable for various
applications, including multiplexed systems that switch fullscale
voltage levels in successive channels and for sampling
inputs at frequencies well beyond the nyquist rate.
dual single-ended clock inputs are used to control all internal
conversion cycles. a duty cycle stabilizer is available and can
compensate for wide variations in the clock duty cycle, allowing
the converter to maintain excellent performance. the digital
output data is presented in either straight binary or twos
complement format. out-of-range signals indicate an overflow
condition, which can be used with the most significant bit to
determine low or high overflow.
functional block diagram
特征
集成双12位adc
单3 v电源供电(2.7 v至3.6 v)
snr = 70 db(对奈奎斯特,ad9238-65)
sfdr = 80.5 dbc(至nyquist,ad9238-65)
低功耗:300 mw /通道,65 msps
差分输入,500 mhz,3 db带宽
出色的串扰抗扰度> 85 db
灵活的模拟输入:1 v p-p至2 v p-p范围
偏移二进制或二进制补码数据格式
时钟占空比稳定器
输出datamux选项
应用
超声设备
直接转换或if采样接收器
wb-cdma,cdma2000,wimax
电池供电的仪器
手持式示波表
低成本的数字示波器
ad9248(14位、20/40/65 msps adc)
ad9216(10位、65/80/105 msps双核adc)
ad9238是一款双通道,3 v,12位,20 msps / 40 msps / 65 msps
模数转换器(adc)。它具有双高
性能采样保持放大器(sha)和
集成电压参考。
- 51电子网公益库存:
- MC100LVE222FAG
- MC14076BCPG
- MC14082BCPG
- MC14082BDG
- MC14093BCPG
- MC14093BDTR2G
- MC14094BCPG
- MC14099BDWR2G
- MC1413DG
- MC14174BCPG
- MC14175BCPG
- MC14490DWG
- MC1488/BCA
- MC1488/BCAJC
- MC1488L
- MC1495L
- MC1496D
- MC1496G
- MC14C88BDR2
- MC14LC54080DW
ad9238采用多级
具有输出纠错的差分流水线架构
逻辑提供12位精度并保证不丢失
代码在整个工作温度范围内最高可达
65 msps数据速率。宽带宽,差分sha
允许各种用户可选择的输入范围和偏移,
包括单端应用程序。适合各种用途http://wobo666.51dzw.com
应用程序,包括切换全尺寸的多路复用系统
连续通道中的电压电平和采样
输入频率远远超过奈奎斯特速率。
双单端时钟输入用于控制所有内部
转换周期。可以使用工作循环稳定器
允许,补偿时钟占空比的广泛变化
转换器保持优异的性能。数字化
输出数据以直接二进制或二进制形式显示
补充格式。超出范围的信号表示溢出
条件,可以与最重要的位一起使用
确定低或高溢出。
the ad9238 is a dual, 3 v, 12-bit, 20 msps/40 msps/65 msps
analog-to-digital converter (adc). it features dual high
performance sample-and-hold amplifiers (shas) and an
integrated voltage reference. the ad9238 uses a multistage
differential pipelined architecture with output error correction
logic to provide 12-bit accuracy and to guarantee no missing
codes over the full operating temperature range at up to
65 msps data rates. the wide bandwidth, differential sha
allows for a variety of user-selectable input ranges and offsets,
including single-ended applications. it is suitable for various
applications, including multiplexed systems that switch fullscale
voltage levels in successive channels and for sampling
inputs at frequencies well beyond the nyquist rate.
dual single-ended clock inputs are used to control all internal
conversion cycles. a duty cycle stabilizer is available and can
compensate for wide variations in the clock duty cycle, allowing
the converter to maintain excellent performance. the digital
output data is presented in either straight binary or twos
complement format. out-of-range signals indicate an overflow
condition, which can be used with the most significant bit to
determine low or high overflow.
functional block diagram
特征
集成双12位adc
单3 v电源供电(2.7 v至3.6 v)
snr = 70 db(对奈奎斯特,ad9238-65)
sfdr = 80.5 dbc(至nyquist,ad9238-65)
低功耗:300 mw /通道,65 msps
差分输入,500 mhz,3 db带宽
出色的串扰抗扰度> 85 db
灵活的模拟输入:1 v p-p至2 v p-p范围
偏移二进制或二进制补码数据格式
时钟占空比稳定器
输出datamux选项
应用
超声设备
直接转换或if采样接收器
wb-cdma,cdma2000,wimax
电池供电的仪器
手持式示波表
低成本的数字示波器
ad9248(14位、20/40/65 msps adc)
ad9216(10位、65/80/105 msps双核adc)